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bug: add chip counts for M31S+ V30, V40, and V100.

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This commit is contained in:
UpstreamData
2023-01-31 09:54:35 -07:00
parent 83bb2950fa
commit 62194bd627
1 changed files with 3 additions and 12 deletions
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15
pyasic/miners/_types/whatsminer/M3X/M31S_Plus.py
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@@ -46,10 +46,7 @@ class M31SPlusV30(WhatsMiner): # noqa - ignore ABC method implementation
super().__init__()
self.ip = ip
self.model = "M31S+ V30"
self.nominal_chips = 0
warnings.warn(
"Unknown chip count for miner type M30S+ V30, please open an issue on GitHub (https://github.com/UpstreamData/pyasic)."
)
self.nominal_chips = 117
self.fan_count = 2
@@ -58,10 +55,7 @@ class M31SPlusV40(WhatsMiner): # noqa - ignore ABC method implementation
super().__init__()
self.ip = ip
self.model = "M31S+ V40"
self.nominal_chips = 0
warnings.warn(
"Unknown chip count for miner type M30S+ V40, please open an issue on GitHub (https://github.com/UpstreamData/pyasic)."
)
self.nominal_chips = 123
self.fan_count = 2
@@ -109,10 +103,7 @@ class M31SPlusV100(WhatsMiner): # noqa - ignore ABC method implementation
super().__init__()
self.ip = ip
self.model = "M31S+ V100"
self.nominal_chips = 0
warnings.warn(
"Unknown chip count for miner type M30S+ V100, please open an issue on GitHub (https://github.com/UpstreamData/pyasic)."
)
self.nominal_chips = 111
self.fan_count = 2