feature: add support for Whatsminer M31SV20, and fix a bug with miner factory not identifying the miners properly by removing a V prefix.

This commit is contained in:
UpstreamData
2022-12-03 14:20:37 -07:00
parent 566280f280
commit 3bcfb14177
8 changed files with 30 additions and 7 deletions

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@@ -91,6 +91,7 @@ details {
<details>
<summary><a href="../whatsminer/M3X/#m31s">M31S</a></summary>
<summary><a href="../whatsminer/M3X/#m31sv10">M31SV10</a></summary>
<summary><a href="../whatsminer/M3X/#m31sv20">M31SV20</a></summary>
<summary><a href="../whatsminer/M3X/#m31sv60">M31SV60</a></summary>
<summary><a href="../whatsminer/M3X/#m31sv70">M31SV70</a></summary>
</details>

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@@ -122,6 +122,14 @@
show_root_heading: false
heading_level: 4
## M31SV20
::: pyasic.miners.whatsminer.btminer.M3X.M31S.BTMinerM31SV20
handler: python
options:
show_root_heading: false
heading_level: 4
## M31SV60
::: pyasic.miners.whatsminer.btminer.M3X.M31S.BTMinerM31SV60

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@@ -28,7 +28,7 @@ from pyasic.errors import APIError
from pyasic.miners.base import BaseMiner
from pyasic.settings import PyasicSettings
#TODO: Fix quota splitting in get data
class BOSMiner(BaseMiner):
def __init__(self, ip: str) -> None:
super().__init__(ip)

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@@ -32,6 +32,14 @@ class M31SV10(BaseMiner): # noqa - ignore ABC method implementation
self.nominal_chips = 105
self.fan_count = 2
class M31SV20(BaseMiner): # noqa - ignore ABC method implementation
def __init__(self, ip: str):
super().__init__()
self.ip = ip
self.model = "M31S V20"
self.nominal_chips = 111
self.fan_count = 2
class M31SV60(BaseMiner): # noqa - ignore ABC method implementation
def __init__(self, ip: str):
super().__init__()

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@@ -20,7 +20,7 @@ from .M30S_Plus_Plus import (
M30SPlusPlusVG40,
M30SPlusPlusVH60,
)
from .M31S import M31S, M31SV10, M31SV60, M31SV70
from .M31S import M31S, M31SV10, M31SV20, M31SV60, M31SV70
from .M31S_Plus import (
M31SPlus,
M31SPlusV30,

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@@ -195,9 +195,10 @@ MINER_CLASSES = {
"M31S": {
"Default": BTMinerM31S,
"BTMiner": BTMinerM31S,
"V10": BTMinerM31SV10,
"V60": BTMinerM31SV60,
"V70": BTMinerM31SV70,
"10": BTMinerM31SV10,
"20": BTMinerM31SV20,
"60": BTMinerM31SV60,
"70": BTMinerM31SV70,
},
"M31S+": {
"Default": BTMinerM31SPlus,

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@@ -13,7 +13,7 @@
# limitations under the License.
from pyasic.miners._backends import BTMiner # noqa - Ignore access to _module
from pyasic.miners._types import M31S, M31SV10, M31SV60, M31SV70 # noqa - Ignore access to _module
from pyasic.miners._types import M31S, M31SV10, M31SV20, M31SV60, M31SV70 # noqa - Ignore access to _module
class BTMinerM31S(BTMiner, M31S):
@@ -21,6 +21,11 @@ class BTMinerM31S(BTMiner, M31S):
super().__init__(ip)
self.ip = ip
class BTMinerM31SV20(BTMiner, M31SV20):
def __init__(self, ip: str) -> None:
super().__init__(ip)
self.ip = ip
class BTMinerM31SV10(BTMiner, M31SV10):
def __init__(self, ip: str) -> None:

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@@ -31,7 +31,7 @@ from .M30S_Plus_Plus import (
BTMinerM30SPlusPlusVG40,
BTMinerM30SPlusPlusVH60,
)
from .M31S import BTMinerM31S, BTMinerM31SV10, BTMinerM31SV60, BTMinerM31SV70
from .M31S import BTMinerM31S, BTMinerM31SV10, BTMinerM31SV20, BTMinerM31SV60, BTMinerM31SV70
from .M31S_Plus import (
BTMinerM31SPlus,
BTMinerM31SPlusV30,