feature: add support for M50S++VL30, update docs, fix hammer bug, and handle errors with data on unknown types of miners

pyasic/device/algorithm/base.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 
-from .hashrate.base import AlgoHashRateType
-from .hashrate.unit.base import AlgoHashRateUnitType
+from .hashrate.base import AlgoHashRateType, GenericHashrate
+from .hashrate.unit.base import AlgoHashRateUnitType, GenericUnit
 
 
 class MinerAlgoMeta(type):
@@ -14,3 +14,10 @@ class MinerAlgoMeta(type):
 class MinerAlgoType(metaclass=MinerAlgoMeta):
     hashrate: type[AlgoHashRateType]
     unit: type[AlgoHashRateUnitType]
+
+
+class GenericAlgo(MinerAlgoType):
+    hashrate: type[GenericHashrate] = GenericHashrate
+    unit: type[GenericUnit] = GenericUnit
+
+    name = "Generic (Unknown)"

pyasic/device/models.py

@@ -252,6 +252,7 @@ class WhatsminerModels(MinerModelType):
     M50SPlusPlusVK10 = "M50S++ VK10"
     M50SPlusPlusVK20 = "M50S++ VK20"
     M50SPlusPlusVK30 = "M50S++ VK30"
+    M50SPlusPlusVL30 = "M50S++ VL30"
     M53VH30 = "M53 VH30"
     M53SVH30 = "M53S VH30"
     M53SVJ40 = "M53S VJ40"

pyasic/miners/backends/hammer.py

@@ -229,7 +229,7 @@ class BlackMiner(StockFirmware):
                         hashrate = boards[1].get(f"chain_rate{i}")
                         if hashrate:
                             hashboard.hashrate = self.algo.hashrate(
-                                rate=float(hashrate), unit=self.algo.unit.MH
+                                rate=float(hashrate), unit=self.algo.unit.GH
                             ).into(self.algo.unit.default)
 
                         chips = boards[1].get(f"chain_acn{i}")

pyasic/miners/base.py

@@ -24,6 +24,7 @@ from pyasic.data.device import DeviceInfo
 from pyasic.data.error_codes import MinerErrorData
 from pyasic.data.pools import PoolMetrics
 from pyasic.device.algorithm import MinerAlgoType
+from pyasic.device.algorithm.base import GenericAlgo
 from pyasic.device.algorithm.hashrate import AlgoHashRate
 from pyasic.device.firmware import MinerFirmware
 from pyasic.device.makes import MinerMake
@@ -46,7 +47,7 @@ class MinerProtocol(Protocol):
     make: MinerMake = None
     raw_model: MinerModelType = None
     firmware: MinerFirmware = None
-    algo: type[MinerAlgoType] = None
+    algo: type[MinerAlgoType] = GenericAlgo
 
     expected_hashboards: int = None
     expected_chips: int = None

pyasic/miners/device/models/whatsminer/M5X/M50S_Plus_Plus.py

@@ -42,3 +42,11 @@ class M50SPlusPlusVK30(WhatsMinerMake):
     expected_fans = 2
     expected_hashboards = 3
     algo = MinerAlgo.SHA256
+
+
+class M50SPlusPlusVL30(WhatsMinerMake):
+    raw_model = MinerModel.WHATSMINER.M50SPlusPlusVL30
+
+    expected_fans = 2
+    expected_hashboards = 3
+    algo = MinerAlgo.SHA256

pyasic/miners/device/models/whatsminer/M5X/__init__.py

@@ -41,7 +41,12 @@ from .M50S import (
     M50SVJ30,
 )
 from .M50S_Plus import M50SPlusVH30, M50SPlusVH40, M50SPlusVJ30, M50SPlusVK20
-from .M50S_Plus_Plus import M50SPlusPlusVK10, M50SPlusPlusVK20, M50SPlusPlusVK30
+from .M50S_Plus_Plus import (
+    M50SPlusPlusVK10,
+    M50SPlusPlusVK20,
+    M50SPlusPlusVK30,
+    M50SPlusPlusVL30,
+)
 from .M53 import M53VH30
 from .M53S import M53SVH30, M53SVJ40
 from .M53S_Plus import M53SPlusVJ30

pyasic/miners/factory.py

@@ -303,6 +303,7 @@ MINER_CLASSES = {
         "M50S++VK10": BTMinerM50SPlusPlusVK10,
         "M50S++VK20": BTMinerM50SPlusPlusVK20,
         "M50S++VK30": BTMinerM50SPlusPlusVK30,
+        "M50S++VL30": BTMinerM50SPlusPlusVL30,
         "M53VH30": BTMinerM53VH30,
         "M53SVH30": BTMinerM53SVH30,
         "M53SVJ40": BTMinerM53SVJ40,

pyasic/miners/whatsminer/btminer/M5X/M50S_Plus_Plus.py

@@ -19,6 +19,7 @@ from pyasic.miners.device.models.whatsminer import (  # noqa - ignore _module im
     M50SPlusPlusVK10,
     M50SPlusPlusVK20,
     M50SPlusPlusVK30,
+    M50SPlusPlusVL30,
 )
 
 
@@ -32,3 +33,7 @@ class BTMinerM50SPlusPlusVK20(M50SPlusPlusVK20, M5X):
 
 class BTMinerM50SPlusPlusVK30(M50SPlusPlusVK30, M5X):
     pass
+
+
+class BTMinerM50SPlusPlusVL30(M50SPlusPlusVL30, M5X):
+    pass

pyasic/miners/whatsminer/btminer/M5X/__init__.py

@@ -50,6 +50,7 @@ from .M50S_Plus_Plus import (
     BTMinerM50SPlusPlusVK10,
     BTMinerM50SPlusPlusVK20,
     BTMinerM50SPlusPlusVK30,
+    BTMinerM50SPlusPlusVL30,
 )
 from .M53 import BTMinerM53VH30
 from .M53S import BTMinerM53SVH30, BTMinerM53SVJ40