feature: rename MinerModels to MinerModel, and add device info in as properties of MinerData.

This commit is contained in:
Upstream Data
2024-05-09 12:48:30 -06:00
parent 1d67e5ed68
commit f6a134342a
94 changed files with 412 additions and 378 deletions

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@@ -13,17 +13,17 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M30V10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30V10
raw_model = MinerModel.WHATSMINER.M30V10
expected_chips = 105
class M30V20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30V20
raw_model = MinerModel.WHATSMINER.M30V20
expected_chips = 111

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@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M30KV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30KV10
raw_model = MinerModel.WHATSMINER.M30KV10
expected_hashboards = 4
expected_chips = 240

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@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M30LV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30LV10
raw_model = MinerModel.WHATSMINER.M30LV10
board_num = 4
expected_chips = 144

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@@ -13,169 +13,169 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M30SV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV10
raw_model = MinerModel.WHATSMINER.M30SV10
expected_chips = 148
class M30SV20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV20
raw_model = MinerModel.WHATSMINER.M30SV20
expected_chips = 156
class M30SV30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV30
raw_model = MinerModel.WHATSMINER.M30SV30
expected_chips = 164
class M30SV40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV40
raw_model = MinerModel.WHATSMINER.M30SV40
expected_chips = 172
class M30SV50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV50
raw_model = MinerModel.WHATSMINER.M30SV50
expected_chips = 156
class M30SV60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV60
raw_model = MinerModel.WHATSMINER.M30SV60
expected_chips = 164
class M30SV70(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV70
raw_model = MinerModel.WHATSMINER.M30SV70
class M30SV80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SV80
raw_model = MinerModel.WHATSMINER.M30SV80
expected_chips = 129
class M30SVE10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE10
raw_model = MinerModel.WHATSMINER.M30SVE10
expected_chips = 105
class M30SVE20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE20
raw_model = MinerModel.WHATSMINER.M30SVE20
expected_chips = 111
class M30SVE30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE30
raw_model = MinerModel.WHATSMINER.M30SVE30
expected_chips = 117
class M30SVE40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE40
raw_model = MinerModel.WHATSMINER.M30SVE40
expected_chips = 123
class M30SVE50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE50
raw_model = MinerModel.WHATSMINER.M30SVE50
expected_chips = 129
class M30SVE60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE60
raw_model = MinerModel.WHATSMINER.M30SVE60
class M30SVE70(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVE70
raw_model = MinerModel.WHATSMINER.M30SVE70
class M30SVF10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVF10
raw_model = MinerModel.WHATSMINER.M30SVF10
expected_chips = 70
class M30SVF20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVF20
raw_model = MinerModel.WHATSMINER.M30SVF20
expected_chips = 74
class M30SVF30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVF30
raw_model = MinerModel.WHATSMINER.M30SVF30
expected_chips = 78
class M30SVG10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVG10
raw_model = MinerModel.WHATSMINER.M30SVG10
expected_chips = 66
class M30SVG20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVG20
raw_model = MinerModel.WHATSMINER.M30SVG20
expected_chips = 70
class M30SVG30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVG30
raw_model = MinerModel.WHATSMINER.M30SVG30
expected_chips = 74
class M30SVG40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVG40
raw_model = MinerModel.WHATSMINER.M30SVG40
expected_chips = 78
class M30SVH10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVH10
raw_model = MinerModel.WHATSMINER.M30SVH10
expected_chips = 64
class M30SVH20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVH20
raw_model = MinerModel.WHATSMINER.M30SVH20
expected_chips = 66
class M30SVH30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVH30
raw_model = MinerModel.WHATSMINER.M30SVH30
class M30SVH40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVH40
raw_model = MinerModel.WHATSMINER.M30SVH40
expected_chips = 64
class M30SVH50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVH50
raw_model = MinerModel.WHATSMINER.M30SVH50
expected_chips = 66
class M30SVH60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVH60
raw_model = MinerModel.WHATSMINER.M30SVH60
class M30SVI20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SVI20
raw_model = MinerModel.WHATSMINER.M30SVI20
expected_chips = 70

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@@ -13,181 +13,181 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M30SPlusV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV10
raw_model = MinerModel.WHATSMINER.M30SPlusV10
expected_chips = 215
class M30SPlusV20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV20
raw_model = MinerModel.WHATSMINER.M30SPlusV20
expected_chips = 255
class M30SPlusV30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV30
raw_model = MinerModel.WHATSMINER.M30SPlusV30
class M30SPlusV40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV40
raw_model = MinerModel.WHATSMINER.M30SPlusV40
expected_chips = 235
class M30SPlusV50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV50
raw_model = MinerModel.WHATSMINER.M30SPlusV50
expected_chips = 225
class M30SPlusV60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV60
raw_model = MinerModel.WHATSMINER.M30SPlusV60
expected_chips = 245
class M30SPlusV70(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV70
raw_model = MinerModel.WHATSMINER.M30SPlusV70
expected_chips = 235
class M30SPlusV80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV80
raw_model = MinerModel.WHATSMINER.M30SPlusV80
expected_chips = 245
class M30SPlusV90(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV90
raw_model = MinerModel.WHATSMINER.M30SPlusV90
expected_chips = 225
class M30SPlusV100(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusV100
raw_model = MinerModel.WHATSMINER.M30SPlusV100
expected_chips = 215
class M30SPlusVE30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE30
raw_model = MinerModel.WHATSMINER.M30SPlusVE30
expected_chips = 148
class M30SPlusVE40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE40
raw_model = MinerModel.WHATSMINER.M30SPlusVE40
expected_chips = 156
class M30SPlusVE50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE50
raw_model = MinerModel.WHATSMINER.M30SPlusVE50
expected_chips = 164
class M30SPlusVE60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE60
raw_model = MinerModel.WHATSMINER.M30SPlusVE60
expected_chips = 172
class M30SPlusVE70(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE70
raw_model = MinerModel.WHATSMINER.M30SPlusVE70
class M30SPlusVE80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE80
raw_model = MinerModel.WHATSMINER.M30SPlusVE80
class M30SPlusVE90(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE90
raw_model = MinerModel.WHATSMINER.M30SPlusVE90
class M30SPlusVE100(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVE100
raw_model = MinerModel.WHATSMINER.M30SPlusVE100
class M30SPlusVF20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVF20
raw_model = MinerModel.WHATSMINER.M30SPlusVF20
expected_chips = 111
class M30SPlusVF30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVF30
raw_model = MinerModel.WHATSMINER.M30SPlusVF30
expected_chips = 117
class M30SPlusVG20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVG20
raw_model = MinerModel.WHATSMINER.M30SPlusVG20
expected_chips = 82
class M30SPlusVG30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVG30
raw_model = MinerModel.WHATSMINER.M30SPlusVG30
expected_chips = 78
class M30SPlusVG40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVG40
raw_model = MinerModel.WHATSMINER.M30SPlusVG40
expected_chips = 105
class M30SPlusVG50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVG50
raw_model = MinerModel.WHATSMINER.M30SPlusVG50
expected_chips = 111
class M30SPlusVG60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVG60
raw_model = MinerModel.WHATSMINER.M30SPlusVG60
expected_chips = 86
class M30SPlusVH10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVH10
raw_model = MinerModel.WHATSMINER.M30SPlusVH10
expected_chips = 64
class M30SPlusVH20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVH20
raw_model = MinerModel.WHATSMINER.M30SPlusVH20
expected_chips = 66
class M30SPlusVH30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVH30
raw_model = MinerModel.WHATSMINER.M30SPlusVH30
expected_chips = 70
class M30SPlusVH40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVH40
raw_model = MinerModel.WHATSMINER.M30SPlusVH40
expected_chips = 74
class M30SPlusVH50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVH50
raw_model = MinerModel.WHATSMINER.M30SPlusVH50
expected_chips = 64
class M30SPlusVH60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusVH60
raw_model = MinerModel.WHATSMINER.M30SPlusVH60
expected_chips = 66

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@@ -13,109 +13,109 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M30SPlusPlusV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusV10
raw_model = MinerModel.WHATSMINER.M30SPlusPlusV10
expected_hashboards = 4
expected_chips = 255
class M30SPlusPlusV20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusV20
raw_model = MinerModel.WHATSMINER.M30SPlusPlusV20
expected_hashboards = 4
expected_chips = 255
class M30SPlusPlusVE30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVE30
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVE30
expected_chips = 215
class M30SPlusPlusVE40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVE40
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVE40
expected_chips = 225
class M30SPlusPlusVE50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVE50
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVE50
expected_chips = 235
class M30SPlusPlusVF40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVF40
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVF40
expected_chips = 156
class M30SPlusPlusVG30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVG30
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVG30
expected_chips = 111
class M30SPlusPlusVG40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVG40
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVG40
expected_chips = 117
class M30SPlusPlusVG50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVG50
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVG50
class M30SPlusPlusVH10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH10
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH10
expected_chips = 82
class M30SPlusPlusVH20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH20
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH20
expected_chips = 86
class M30SPlusPlusVH30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH30
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH30
expected_chips = 111
class M30SPlusPlusVH40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH40
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH40
expected_chips = 70
class M30SPlusPlusVH50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH50
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH50
expected_chips = 74
class M30SPlusPlusVH60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH60
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH60
expected_chips = 78
class M30SPlusPlusVH70(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH70
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH70
expected_chips = 70
class M30SPlusPlusVH80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH80
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH80
expected_chips = 74
class M30SPlusPlusVH90(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH90
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH90
expected_chips = 78
class M30SPlusPlusVH100(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH100
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH100
expected_chips = 82
class M30SPlusPlusVJ20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVJ20
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVJ20
class M30SPlusPlusVJ30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M30SPlusPlusVJ30
raw_model = MinerModel.WHATSMINER.M30SPlusPlusVJ30

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@@ -13,17 +13,17 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M31V10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31V10
raw_model = MinerModel.WHATSMINER.M31V10
expected_chips = 70
class M31V20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31V20
raw_model = MinerModel.WHATSMINER.M31V20
expected_chips = 74

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@@ -13,19 +13,19 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M31HV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31HV10
raw_model = MinerModel.WHATSMINER.M31HV10
expected_chips = 114
expected_fans = 0
class M31HV40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31HV40
raw_model = MinerModel.WHATSMINER.M31HV40
expected_hashboards = 4
expected_chips = 136

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@@ -13,11 +13,11 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M31LV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31LV10
raw_model = MinerModel.WHATSMINER.M31LV10
expected_chips = 114

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@@ -13,73 +13,73 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M31SV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV10
raw_model = MinerModel.WHATSMINER.M31SV10
expected_chips = 105
class M31SV20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV20
raw_model = MinerModel.WHATSMINER.M31SV20
expected_chips = 111
class M31SV30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV30
raw_model = MinerModel.WHATSMINER.M31SV30
expected_chips = 117
class M31SV40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV40
raw_model = MinerModel.WHATSMINER.M31SV40
expected_chips = 123
class M31SV50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV50
raw_model = MinerModel.WHATSMINER.M31SV50
expected_chips = 78
class M31SV60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV60
raw_model = MinerModel.WHATSMINER.M31SV60
expected_chips = 105
class M31SV70(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV70
raw_model = MinerModel.WHATSMINER.M31SV70
expected_chips = 111
class M31SV80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV80
raw_model = MinerModel.WHATSMINER.M31SV80
class M31SV90(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SV90
raw_model = MinerModel.WHATSMINER.M31SV90
expected_chips = 117
class M31SVE10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SVE10
raw_model = MinerModel.WHATSMINER.M31SVE10
expected_chips = 70
class M31SVE20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SVE20
raw_model = MinerModel.WHATSMINER.M31SVE20
expected_chips = 74
class M31SVE30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SVE30
raw_model = MinerModel.WHATSMINER.M31SVE30

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@@ -13,23 +13,23 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M31SEV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SEV10
raw_model = MinerModel.WHATSMINER.M31SEV10
expected_chips = 82
class M31SEV20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SEV20
raw_model = MinerModel.WHATSMINER.M31SEV20
expected_chips = 78
class M31SEV30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SEV30
raw_model = MinerModel.WHATSMINER.M31SEV30
expected_chips = 78

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@@ -13,119 +13,119 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M31SPlusV10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV10
raw_model = MinerModel.WHATSMINER.M31SPlusV10
expected_chips = 105
class M31SPlusV20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV20
raw_model = MinerModel.WHATSMINER.M31SPlusV20
expected_chips = 111
class M31SPlusV30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV30
raw_model = MinerModel.WHATSMINER.M31SPlusV30
expected_chips = 117
class M31SPlusV40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV40
raw_model = MinerModel.WHATSMINER.M31SPlusV40
expected_chips = 123
class M31SPlusV50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV50
raw_model = MinerModel.WHATSMINER.M31SPlusV50
expected_chips = 148
class M31SPlusV60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV60
raw_model = MinerModel.WHATSMINER.M31SPlusV60
expected_chips = 156
class M31SPlusV80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV80
raw_model = MinerModel.WHATSMINER.M31SPlusV80
expected_chips = 129
class M31SPlusV90(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV90
raw_model = MinerModel.WHATSMINER.M31SPlusV90
expected_chips = 117
class M31SPlusV100(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusV100
raw_model = MinerModel.WHATSMINER.M31SPlusV100
expected_chips = 111
class M31SPlusVE10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE10
raw_model = MinerModel.WHATSMINER.M31SPlusVE10
expected_chips = 82
class M31SPlusVE20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE20
raw_model = MinerModel.WHATSMINER.M31SPlusVE20
expected_chips = 78
class M31SPlusVE30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE30
raw_model = MinerModel.WHATSMINER.M31SPlusVE30
expected_chips = 105
class M31SPlusVE40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE40
raw_model = MinerModel.WHATSMINER.M31SPlusVE40
expected_chips = 111
class M31SPlusVE50(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE50
raw_model = MinerModel.WHATSMINER.M31SPlusVE50
expected_chips = 117
class M31SPlusVE60(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE60
raw_model = MinerModel.WHATSMINER.M31SPlusVE60
class M31SPlusVE80(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVE80
raw_model = MinerModel.WHATSMINER.M31SPlusVE80
class M31SPlusVF20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVF20
raw_model = MinerModel.WHATSMINER.M31SPlusVF20
expected_chips = 66
class M31SPlusVF30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVF30
raw_model = MinerModel.WHATSMINER.M31SPlusVF30
class M31SPlusVG20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVG20
raw_model = MinerModel.WHATSMINER.M31SPlusVG20
expected_chips = 66
class M31SPlusVG30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M31SPlusVG30
raw_model = MinerModel.WHATSMINER.M31SPlusVG30
expected_chips = 70

View File

@@ -13,17 +13,17 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M32V10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M32V10
raw_model = MinerModel.WHATSMINER.M32V10
expected_chips = 78
class M32V20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M32V20
raw_model = MinerModel.WHATSMINER.M32V20
expected_chips = 74

View File

@@ -13,11 +13,11 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M32S(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M32S
raw_model = MinerModel.WHATSMINER.M32S
expected_chips = 78

View File

@@ -13,26 +13,26 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M33V10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33V10
raw_model = MinerModel.WHATSMINER.M33V10
expected_chips = 33
expected_fans = 0
class M33V20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33V20
raw_model = MinerModel.WHATSMINER.M33V20
expected_chips = 62
expected_fans = 0
class M33V30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33V30
raw_model = MinerModel.WHATSMINER.M33V30
expected_chips = 66
expected_fans = 0

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M33SVG30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SVG30
raw_model = MinerModel.WHATSMINER.M33SVG30
expected_hashboards = 4
expected_chips = 116

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M33SPlusVG20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SPlusVG20
raw_model = MinerModel.WHATSMINER.M33SPlusVG20
expected_hashboards = 4
expected_chips = 112
@@ -26,7 +26,7 @@ class M33SPlusVG20(WhatsMinerMake):
class M33SPlusVH20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SPlusVH20
raw_model = MinerModel.WHATSMINER.M33SPlusVH20
expected_hashboards = 4
expected_chips = 100
@@ -34,7 +34,7 @@ class M33SPlusVH20(WhatsMinerMake):
class M33SPlusVH30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SPlusVH30
raw_model = MinerModel.WHATSMINER.M33SPlusVH30
expected_hashboards = 4
expected_fans = 0

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M33SPlusPlusVH20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SPlusPlusVH20
raw_model = MinerModel.WHATSMINER.M33SPlusPlusVH20
expected_hashboards = 4
expected_chips = 112
@@ -26,14 +26,14 @@ class M33SPlusPlusVH20(WhatsMinerMake):
class M33SPlusPlusVH30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SPlusPlusVH30
raw_model = MinerModel.WHATSMINER.M33SPlusPlusVH30
expected_hashboards = 4
expected_fans = 0
class M33SPlusPlusVG40(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M33SPlusPlusVG40
raw_model = MinerModel.WHATSMINER.M33SPlusPlusVG40
expected_hashboards = 4
expected_chips = 174

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M34SPlusVE10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M34SPlusVE10
raw_model = MinerModel.WHATSMINER.M34SPlusVE10
expected_hashboards = 4
expected_chips = 116

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M36SVE10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M36SVE10
raw_model = MinerModel.WHATSMINER.M36SVE10
expected_hashboards = 4
expected_chips = 114

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M36SPlusVG30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M36SPlusVG30
raw_model = MinerModel.WHATSMINER.M36SPlusVG30
expected_hashboards = 4
expected_chips = 108

View File

@@ -13,12 +13,12 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M36SPlusPlusVH30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M36SPlusPlusVH30
raw_model = MinerModel.WHATSMINER.M36SPlusPlusVH30
expected_hashboards = 4
expected_chips = 80

View File

@@ -13,26 +13,26 @@
# See the License for the specific language governing permissions and -
# limitations under the License. -
# ------------------------------------------------------------------------------
from pyasic.device.models import MinerModels
from pyasic.device.models import MinerModel
from pyasic.miners.device.makes import WhatsMinerMake
class M39V10(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M39V10
raw_model = MinerModel.WHATSMINER.M39V10
expected_chips = 50
expected_fans = 0
class M39V20(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M39V20
raw_model = MinerModel.WHATSMINER.M39V20
expected_chips = 54
expected_fans = 0
class M39V30(WhatsMinerMake):
raw_model = MinerModels.WHATSMINER.M39V30
raw_model = MinerModel.WHATSMINER.M39V30
expected_chips = 68
expected_fans = 0