add support for some new whatsminers types, M31S+ v40 and v80, and improve documentation of supported types.

pyasic/miners/_types/whatsminer/M3X/M31S_Plus.py

@@ -31,3 +31,21 @@ class M31SPlusVE20(BaseMiner):
         self.model = "M31S+ VE20"
         self.nominal_chips = 78
         self.fan_count = 2
+
+
+class M31SPlusV40(BaseMiner):
+    def __init__(self, ip: str):
+        super().__init__()
+        self.ip = ip
+        self.model = "M31S+ V40"
+        self.nominal_chips = 123
+        self.fan_count = 2
+
+
+class M31SPlusV80(BaseMiner):
+    def __init__(self, ip: str):
+        super().__init__()
+        self.ip = ip
+        self.model = "M31S+ V40"
+        self.nominal_chips = 129
+        self.fan_count = 2

pyasic/miners/_types/whatsminer/M3X/__init__.py

@@ -22,7 +22,7 @@ from .M30S_Plus_Plus import (
 )
 
 from .M31S import M31S
-from .M31S_Plus import M31SPlus, M31SPlusVE20
+from .M31S_Plus import M31SPlus, M31SPlusVE20, M31SPlusV40, M31SPlusV80
 
 from .M32 import M32, M32V20
 from .M32S import M32S

pyasic/miners/innosilicon/cgminer/T3X/T3H_Plus.py

@@ -158,11 +158,6 @@ class CGMinerInnosiliconT3HPlus(CGMiner, InnosiliconT3HPlus):
         return errors
 
     async def get_data(self) -> MinerData:
-        """Get data from the miner.
-
-        Returns:
-            A [`MinerData`][pyasic.data.MinerData] instance containing the miners data.
-        """
         data = MinerData(ip=str(self.ip), ideal_chips=self.nominal_chips * 3)
 
         board_offset = -1

pyasic/miners/miner_factory.py

@@ -197,6 +197,8 @@ MINER_CLASSES = {
         "Default": BTMinerM31SPlus,
         "BTMiner": BTMinerM31SPlus,
         "E20": BTMinerM31SPlusVE20,
+        "40": BTMinerM31SPlusV40,
+        "80": BTMinerM31SPlusV80,
     },
     "M32S": {
         "Default": BTMinerM32S,

pyasic/miners/whatsminer/btminer/M3X/M31S_Plus.py

@@ -16,6 +16,8 @@ from pyasic.miners._backends import BTMiner  # noqa - Ignore access to _module
 from pyasic.miners._types import (
     M31SPlus,
     M31SPlusVE20,
+    M31SPlusV40,
+    M31SPlusV80,
 )  # noqa - Ignore access to _module
 
 
@@ -29,3 +31,15 @@ class BTMinerM31SPlusVE20(BTMiner, M31SPlusVE20):
     def __init__(self, ip: str) -> None:
         super().__init__(ip)
         self.ip = ip
+
+
+class BTMinerM31SPlusV40(BTMiner, M31SPlusV40):
+    def __init__(self, ip: str) -> None:
+        super().__init__(ip)
+        self.ip = ip
+
+
+class BTMinerM31SPlusV80(BTMiner, M31SPlusV80):
+    def __init__(self, ip: str) -> None:
+        super().__init__(ip)
+        self.ip = ip

pyasic/miners/whatsminer/btminer/M3X/__init__.py

@@ -33,7 +33,12 @@ from .M30S_Plus_Plus import (
 )
 
 from .M31S import BTMinerM31S
-from .M31S_Plus import BTMinerM31SPlus, BTMinerM31SPlusVE20
+from .M31S_Plus import (
+    BTMinerM31SPlus,
+    BTMinerM31SPlusVE20,
+    BTMinerM31SPlusV40,
+    BTMinerM31SPlusV80,
+)
 
 from .M32 import BTMinerM32, BTMinerM32V20
 from .M32S import BTMinerM32S