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bug: add chip counts for M30S++ VH100

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This commit is contained in:
UpstreamData
2023-04-27 10:01:43 -06:00
parent b495f22f31
commit bf19232ad9
1 changed files with 1 additions and 4 deletions
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5
pyasic/miners/btc/_types/whatsminer/M3X/M30S_Plus_Plus.py
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@@ -225,10 +225,7 @@ class M30SPlusPlusVH100(WhatsMiner): # noqa - ignore ABC method implementation
super().__init__(ip, api_ver) super().__init__(ip, api_ver)
self.ip = ip self.ip = ip
self.model = "M30S++ VH100" self.model = "M30S++ VH100"
self.nominal_chips = 0 self.nominal_chips = 82
warnings.warn(
"Unknown chip count for miner type M30S++ VH100, please open an issue on GitHub (https://github.com/UpstreamData/pyasic)."
)
self.fan_count = 2 self.fan_count = 2