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feature: add chip count for M30S+VG50.

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This commit is contained in:
UpstreamData
2023-11-20 10:32:51 -07:00
parent 1504bd744c
commit 8bea76ff67
1 changed files with 1 additions and 4 deletions
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5
pyasic/miners/types/whatsminer/M3X/M30S_Plus.py
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@@ -288,10 +288,7 @@ class M30SPlusVG50(WhatsMiner): # noqa - ignore ABC method implementation
super().__init__(ip, api_ver) super().__init__(ip, api_ver)
self.ip = ip self.ip = ip
self.model = "M30S+ VG50" self.model = "M30S+ VG50"
self.nominal_chips = 0 self.nominal_chips = 111
warnings.warn(
"Unknown chip count for miner type M30S+ VG50, please open an issue on GitHub (https://github.com/UpstreamData/pyasic)."
)
self.fan_count = 2 self.fan_count = 2