diff --git a/pyasic/data/__init__.py b/pyasic/data/__init__.py index 0cf5660a..66752530 100644 --- a/pyasic/data/__init__.py +++ b/pyasic/data/__init__.py @@ -75,6 +75,9 @@ class MinerData: # about device_info: DeviceInfo = None + make: str = field(init=False) + model: str = field(init=False) + firmware: str = field(init=False) mac: str = None api_ver: str = None fw_ver: str = None @@ -332,6 +335,33 @@ class MinerData: def timestamp(self, val): pass + @property + def make(self): # noqa - Skip PyCharm inspection + if self.device_info.make is not None: + return str(self.device_info.make) + + @make.setter + def make(self, val): + pass + + @property + def model(self): # noqa - Skip PyCharm inspection + if self.device_info.model is not None: + return str(self.device_info.model) + + @model.setter + def model(self, val): + pass + + @property + def firmware(self): # noqa - Skip PyCharm inspection + if self.device_info.firmware is not None: + return str(self.device_info.firmware) + + @firmware.setter + def firmware(self, val): + pass + def asdict(self) -> dict: return asdict(self, dict_factory=self.dict_factory) diff --git a/pyasic/data/device.py b/pyasic/data/device.py index 01ac56b4..153e9bb4 100644 --- a/pyasic/data/device.py +++ b/pyasic/data/device.py @@ -2,10 +2,11 @@ from dataclasses import dataclass from pyasic.device.firmware import MinerFirmware from pyasic.device.makes import MinerMake +from pyasic.device.models import MinerModel @dataclass class DeviceInfo: make: MinerMake = None - model: str = None + model: MinerModel = None firmware: MinerFirmware = None diff --git a/pyasic/device/__init__.py b/pyasic/device/__init__.py index e69de29b..ac373529 100644 --- a/pyasic/device/__init__.py +++ b/pyasic/device/__init__.py @@ -0,0 +1,3 @@ +from .firmware import MinerFirmware +from .makes import MinerMake +from .models import MinerModel diff --git a/pyasic/device/models.py b/pyasic/device/models.py index 247deee9..de32614a 100644 --- a/pyasic/device/models.py +++ b/pyasic/device/models.py @@ -308,7 +308,7 @@ class AuradineModels(StrEnum): AD3500 = "AD3500" -class MinerModels: +class MinerModel: ANTMINER = AntminerModels WHATSMINER = WhatsminerModels AVALONMINER = AvalonminerModels diff --git a/pyasic/miners/device/models/antminer/X15/Z15.py b/pyasic/miners/device/models/antminer/X15/Z15.py index dd45a389..8b22f056 100644 --- a/pyasic/miners/device/models/antminer/X15/Z15.py +++ b/pyasic/miners/device/models/antminer/X15/Z15.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class Z15(AntMinerMake): - raw_model = MinerModels.ANTMINER.Z15 + raw_model = MinerModel.ANTMINER.Z15 expected_chips = 3 diff --git a/pyasic/miners/device/models/antminer/X17/S17.py b/pyasic/miners/device/models/antminer/X17/S17.py index 66d319c3..b92b72d8 100644 --- a/pyasic/miners/device/models/antminer/X17/S17.py +++ b/pyasic/miners/device/models/antminer/X17/S17.py @@ -13,33 +13,33 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class S17(AntMinerMake): - raw_model = MinerModels.ANTMINER.S17 + raw_model = MinerModel.ANTMINER.S17 expected_chips = 48 expected_fans = 4 class S17Plus(AntMinerMake): - raw_model = MinerModels.ANTMINER.S17Plus + raw_model = MinerModel.ANTMINER.S17Plus expected_chips = 65 expected_fans = 4 class S17Pro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S17Pro + raw_model = MinerModel.ANTMINER.S17Pro expected_chips = 48 expected_fans = 4 class S17e(AntMinerMake): - raw_model = MinerModels.ANTMINER.S17e + raw_model = MinerModel.ANTMINER.S17e expected_chips = 135 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X17/T17.py b/pyasic/miners/device/models/antminer/X17/T17.py index ad6e4af4..6953d708 100644 --- a/pyasic/miners/device/models/antminer/X17/T17.py +++ b/pyasic/miners/device/models/antminer/X17/T17.py @@ -13,26 +13,26 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class T17(AntMinerMake): - raw_model = MinerModels.ANTMINER.T17 + raw_model = MinerModel.ANTMINER.T17 expected_chips = 30 expected_fans = 4 class T17Plus(AntMinerMake): - raw_model = MinerModels.ANTMINER.T17Plus + raw_model = MinerModel.ANTMINER.T17Plus expected_chips = 44 expected_fans = 4 class T17e(AntMinerMake): - raw_model = MinerModels.ANTMINER.T17e + raw_model = MinerModel.ANTMINER.T17e expected_chips = 78 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X19/S19.py b/pyasic/miners/device/models/antminer/X19/S19.py index 64f03698..495a220c 100644 --- a/pyasic/miners/device/models/antminer/X19/S19.py +++ b/pyasic/miners/device/models/antminer/X19/S19.py @@ -13,138 +13,138 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class S19(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19 + raw_model = MinerModel.ANTMINER.S19 expected_chips = 76 expected_fans = 4 class S19NoPIC(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19NoPIC + raw_model = MinerModel.ANTMINER.S19NoPIC expected_chips = 88 expected_fans = 4 class S19Pro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19Pro + raw_model = MinerModel.ANTMINER.S19Pro expected_chips = 114 expected_fans = 4 class S19i(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19i + raw_model = MinerModel.ANTMINER.S19i expected_chips = 80 expected_fans = 4 class S19Plus(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19Plus + raw_model = MinerModel.ANTMINER.S19Plus expected_chips = 80 expected_fans = 4 class S19ProPlus(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19ProPlus + raw_model = MinerModel.ANTMINER.S19ProPlus expected_chips = 120 expected_fans = 4 class S19XP(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19XP + raw_model = MinerModel.ANTMINER.S19XP expected_chips = 110 expected_fans = 4 class S19a(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19a + raw_model = MinerModel.ANTMINER.S19a expected_chips = 72 expected_fans = 4 class S19aPro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19aPro + raw_model = MinerModel.ANTMINER.S19aPro expected_chips = 100 expected_fans = 4 class S19j(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19j + raw_model = MinerModel.ANTMINER.S19j expected_chips = 114 expected_fans = 4 class S19jNoPIC(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19jNoPIC + raw_model = MinerModel.ANTMINER.S19jNoPIC expected_chips = 88 expected_fans = 4 class S19jPro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19jPro + raw_model = MinerModel.ANTMINER.S19jPro expected_chips = 126 expected_fans = 4 class S19jProNoPIC(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19jProNoPIC + raw_model = MinerModel.ANTMINER.S19jProNoPIC expected_chips = 126 expected_fans = 4 class S19jProPlus(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19jProPlus + raw_model = MinerModel.ANTMINER.S19jProPlus expected_chips = 120 expected_fans = 4 class S19jProPlusNoPIC(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19jProPlusNoPIC + raw_model = MinerModel.ANTMINER.S19jProPlusNoPIC expected_chips = 120 expected_fans = 4 class S19kPro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19kPro + raw_model = MinerModel.ANTMINER.S19kPro expected_chips = 77 expected_fans = 4 class S19kProNoPIC(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19kProNoPIC + raw_model = MinerModel.ANTMINER.S19kProNoPIC expected_chips = 77 expected_fans = 4 class S19L(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19L + raw_model = MinerModel.ANTMINER.S19L expected_chips = 76 expected_fans = 4 class S19Hydro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19Hydro + raw_model = MinerModel.ANTMINER.S19Hydro expected_chips = 104 expected_hashboards = 4 @@ -152,7 +152,7 @@ class S19Hydro(AntMinerMake): class S19ProHydro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19ProHydro + raw_model = MinerModel.ANTMINER.S19ProHydro expected_chips = 180 expected_hashboards = 4 @@ -160,7 +160,7 @@ class S19ProHydro(AntMinerMake): class S19ProPlusHydro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19ProPlusHydro + raw_model = MinerModel.ANTMINER.S19ProPlusHydro expected_chips = 180 expected_hashboards = 4 @@ -168,7 +168,7 @@ class S19ProPlusHydro(AntMinerMake): class S19KPro(AntMinerMake): - raw_model = MinerModels.ANTMINER.S19KPro + raw_model = MinerModel.ANTMINER.S19KPro expected_chips = 77 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X19/T19.py b/pyasic/miners/device/models/antminer/X19/T19.py index a956a0bc..16be8899 100644 --- a/pyasic/miners/device/models/antminer/X19/T19.py +++ b/pyasic/miners/device/models/antminer/X19/T19.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class T19(AntMinerMake): - raw_model = MinerModels.ANTMINER.T19 + raw_model = MinerModel.ANTMINER.T19 expected_chips = 76 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X21/S21.py b/pyasic/miners/device/models/antminer/X21/S21.py index 3924559d..bc0c57a7 100644 --- a/pyasic/miners/device/models/antminer/X21/S21.py +++ b/pyasic/miners/device/models/antminer/X21/S21.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class S21(AntMinerMake): - raw_model = MinerModels.ANTMINER.S21 + raw_model = MinerModel.ANTMINER.S21 expected_chips = 108 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X21/T21.py b/pyasic/miners/device/models/antminer/X21/T21.py index df7cb066..c45488aa 100644 --- a/pyasic/miners/device/models/antminer/X21/T21.py +++ b/pyasic/miners/device/models/antminer/X21/T21.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class T21(AntMinerMake): - raw_model = MinerModels.ANTMINER.T21 + raw_model = MinerModel.ANTMINER.T21 expected_chips = 108 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X3/D3.py b/pyasic/miners/device/models/antminer/X3/D3.py index a61dfd3f..dccf360d 100644 --- a/pyasic/miners/device/models/antminer/X3/D3.py +++ b/pyasic/miners/device/models/antminer/X3/D3.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class D3(AntMinerMake): - raw_model = MinerModels.ANTMINER.D3 + raw_model = MinerModel.ANTMINER.D3 expected_chips = 60 diff --git a/pyasic/miners/device/models/antminer/X3/HS3.py b/pyasic/miners/device/models/antminer/X3/HS3.py index dc1f99a2..4cb63717 100644 --- a/pyasic/miners/device/models/antminer/X3/HS3.py +++ b/pyasic/miners/device/models/antminer/X3/HS3.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class HS3(AntMinerMake): - raw_model = MinerModels.ANTMINER.HS3 + raw_model = MinerModel.ANTMINER.HS3 expected_chips = 92 diff --git a/pyasic/miners/device/models/antminer/X3/L3.py b/pyasic/miners/device/models/antminer/X3/L3.py index 921dfcb8..82bb7172 100644 --- a/pyasic/miners/device/models/antminer/X3/L3.py +++ b/pyasic/miners/device/models/antminer/X3/L3.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class L3Plus(AntMinerMake): - raw_model = MinerModels.ANTMINER + raw_model = MinerModel.ANTMINER expected_chips = 72 diff --git a/pyasic/miners/device/models/antminer/X5/DR5.py b/pyasic/miners/device/models/antminer/X5/DR5.py index d5e672b7..18b18b5a 100644 --- a/pyasic/miners/device/models/antminer/X5/DR5.py +++ b/pyasic/miners/device/models/antminer/X5/DR5.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class DR5(AntMinerMake): - raw_model = MinerModels.ANTMINER.DR5 + raw_model = MinerModel.ANTMINER.DR5 expected_chips = 72 diff --git a/pyasic/miners/device/models/antminer/X7/L7.py b/pyasic/miners/device/models/antminer/X7/L7.py index bf84db6d..9049949a 100644 --- a/pyasic/miners/device/models/antminer/X7/L7.py +++ b/pyasic/miners/device/models/antminer/X7/L7.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class L7(AntMinerMake): - raw_model = MinerModels.ANTMINER.L7 + raw_model = MinerModel.ANTMINER.L7 expected_chips = 120 expected_fans = 4 diff --git a/pyasic/miners/device/models/antminer/X9/E9.py b/pyasic/miners/device/models/antminer/X9/E9.py index 4df29518..d7c0e7a6 100644 --- a/pyasic/miners/device/models/antminer/X9/E9.py +++ b/pyasic/miners/device/models/antminer/X9/E9.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class E9Pro(AntMinerMake): - raw_model = MinerModels.ANTMINER.E9Pro + raw_model = MinerModel.ANTMINER.E9Pro expected_chips = 8 expected_hashboards = 2 diff --git a/pyasic/miners/device/models/antminer/X9/S9.py b/pyasic/miners/device/models/antminer/X9/S9.py index a057c8f8..b26d2bad 100644 --- a/pyasic/miners/device/models/antminer/X9/S9.py +++ b/pyasic/miners/device/models/antminer/X9/S9.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class S9(AntMinerMake): - raw_model = MinerModels.ANTMINER.S9 + raw_model = MinerModel.ANTMINER.S9 expected_chips = 63 class S9i(AntMinerMake): - raw_model = MinerModels.ANTMINER.S9i + raw_model = MinerModel.ANTMINER.S9i expected_chips = 63 class S9j(AntMinerMake): - raw_model = MinerModels.ANTMINER.S9j + raw_model = MinerModel.ANTMINER.S9j expected_chips = 63 diff --git a/pyasic/miners/device/models/antminer/X9/T9.py b/pyasic/miners/device/models/antminer/X9/T9.py index b095a787..ad0c8965 100644 --- a/pyasic/miners/device/models/antminer/X9/T9.py +++ b/pyasic/miners/device/models/antminer/X9/T9.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AntMinerMake class T9(AntMinerMake): - raw_model = MinerModels.ANTMINER.T9 + raw_model = MinerModel.ANTMINER.T9 expected_chips = 54 diff --git a/pyasic/miners/device/models/auradine/AD/AD2.py b/pyasic/miners/device/models/auradine/AD/AD2.py index 11ee863c..eedb5088 100644 --- a/pyasic/miners/device/models/auradine/AD/AD2.py +++ b/pyasic/miners/device/models/auradine/AD/AD2.py @@ -1,8 +1,8 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AuradineMake class AuradineAD2500(AuradineMake): - raw_model = MinerModels.AURADINE.AD2500 + raw_model = MinerModel.AURADINE.AD2500 expected_fans = 0 diff --git a/pyasic/miners/device/models/auradine/AD/AD3.py b/pyasic/miners/device/models/auradine/AD/AD3.py index 3a876127..27a2e71b 100644 --- a/pyasic/miners/device/models/auradine/AD/AD3.py +++ b/pyasic/miners/device/models/auradine/AD/AD3.py @@ -1,8 +1,8 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AuradineMake class AuradineAD3500(AuradineMake): - raw_model = MinerModels.AURADINE.AD3500 + raw_model = MinerModel.AURADINE.AD3500 expected_fans = 0 diff --git a/pyasic/miners/device/models/auradine/AI/AI2.py b/pyasic/miners/device/models/auradine/AI/AI2.py index eecf806c..d572a405 100644 --- a/pyasic/miners/device/models/auradine/AI/AI2.py +++ b/pyasic/miners/device/models/auradine/AI/AI2.py @@ -1,8 +1,8 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AuradineMake class AuradineAI2500(AuradineMake): - raw_model = MinerModels.AURADINE.AI2500 + raw_model = MinerModel.AURADINE.AI2500 expected_fans = 0 diff --git a/pyasic/miners/device/models/auradine/AI/AI3.py b/pyasic/miners/device/models/auradine/AI/AI3.py index e7dc87cb..81e70a25 100644 --- a/pyasic/miners/device/models/auradine/AI/AI3.py +++ b/pyasic/miners/device/models/auradine/AI/AI3.py @@ -1,8 +1,8 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AuradineMake class AuradineAI3680(AuradineMake): - raw_model = MinerModels.AURADINE.AI3680 + raw_model = MinerModel.AURADINE.AI3680 expected_fans = 0 diff --git a/pyasic/miners/device/models/auradine/AT/AT1.py b/pyasic/miners/device/models/auradine/AT/AT1.py index 7f659ca7..fa90cb56 100644 --- a/pyasic/miners/device/models/auradine/AT/AT1.py +++ b/pyasic/miners/device/models/auradine/AT/AT1.py @@ -1,9 +1,9 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AuradineMake class AuradineAT1500(AuradineMake): - raw_model = MinerModels.AURADINE.AT1500 + raw_model = MinerModel.AURADINE.AT1500 expected_chips = 132 expected_fans = 4 diff --git a/pyasic/miners/device/models/auradine/AT/AT2.py b/pyasic/miners/device/models/auradine/AT/AT2.py index 4b3477dd..6b18949b 100644 --- a/pyasic/miners/device/models/auradine/AT/AT2.py +++ b/pyasic/miners/device/models/auradine/AT/AT2.py @@ -1,14 +1,14 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AuradineMake class AuradineAT2860(AuradineMake): - raw_model = MinerModels.AURADINE.AT2860 + raw_model = MinerModel.AURADINE.AT2860 expected_fans = 4 class AuradineAT2880(AuradineMake): - raw_model = MinerModels.AURADINE.AT2880 + raw_model = MinerModel.AURADINE.AT2880 expected_fans = 4 diff --git a/pyasic/miners/device/models/avalonminer/A10X/A1026.py b/pyasic/miners/device/models/avalonminer/A10X/A1026.py index cb26d40b..be197cd2 100644 --- a/pyasic/miners/device/models/avalonminer/A10X/A1026.py +++ b/pyasic/miners/device/models/avalonminer/A10X/A1026.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon1026(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon1026 + raw_model = MinerModel.AVALONMINER.Avalon1026 expected_chips = 80 diff --git a/pyasic/miners/device/models/avalonminer/A10X/A1047.py b/pyasic/miners/device/models/avalonminer/A10X/A1047.py index c8113061..3a1e378a 100644 --- a/pyasic/miners/device/models/avalonminer/A10X/A1047.py +++ b/pyasic/miners/device/models/avalonminer/A10X/A1047.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon1047(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon1047 + raw_model = MinerModel.AVALONMINER.Avalon1047 expected_chips = 80 diff --git a/pyasic/miners/device/models/avalonminer/A10X/A1066.py b/pyasic/miners/device/models/avalonminer/A10X/A1066.py index 7324d8cf..8bdc8e68 100644 --- a/pyasic/miners/device/models/avalonminer/A10X/A1066.py +++ b/pyasic/miners/device/models/avalonminer/A10X/A1066.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon1066(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon1066 + raw_model = MinerModel.AVALONMINER.Avalon1066 expected_chips = 114 expected_fans = 4 diff --git a/pyasic/miners/device/models/avalonminer/A11X/A1166.py b/pyasic/miners/device/models/avalonminer/A11X/A1166.py index 8fc6a35b..9b42fbd6 100644 --- a/pyasic/miners/device/models/avalonminer/A11X/A1166.py +++ b/pyasic/miners/device/models/avalonminer/A11X/A1166.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon1166Pro(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon1166Pro + raw_model = MinerModel.AVALONMINER.Avalon1166Pro expected_chips = 120 expected_fans = 4 diff --git a/pyasic/miners/device/models/avalonminer/A12X/A1246.py b/pyasic/miners/device/models/avalonminer/A12X/A1246.py index 1a22fd04..7e1f3279 100644 --- a/pyasic/miners/device/models/avalonminer/A12X/A1246.py +++ b/pyasic/miners/device/models/avalonminer/A12X/A1246.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon1246(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon1246 + raw_model = MinerModel.AVALONMINER.Avalon1246 expected_chips = 120 expected_fans = 4 diff --git a/pyasic/miners/device/models/avalonminer/A7X/A721.py b/pyasic/miners/device/models/avalonminer/A7X/A721.py index 6eaa1e85..ae60010a 100644 --- a/pyasic/miners/device/models/avalonminer/A7X/A721.py +++ b/pyasic/miners/device/models/avalonminer/A7X/A721.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon721(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon721 + raw_model = MinerModel.AVALONMINER.Avalon721 expected_hashboards = 4 expected_chips = 18 diff --git a/pyasic/miners/device/models/avalonminer/A7X/A741.py b/pyasic/miners/device/models/avalonminer/A7X/A741.py index 5b6e9d7b..3ab44e27 100644 --- a/pyasic/miners/device/models/avalonminer/A7X/A741.py +++ b/pyasic/miners/device/models/avalonminer/A7X/A741.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon741(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon741 + raw_model = MinerModel.AVALONMINER.Avalon741 expected_hashboards = 4 expected_chips = 22 diff --git a/pyasic/miners/device/models/avalonminer/A7X/A761.py b/pyasic/miners/device/models/avalonminer/A7X/A761.py index c3b20408..556cb0fa 100644 --- a/pyasic/miners/device/models/avalonminer/A7X/A761.py +++ b/pyasic/miners/device/models/avalonminer/A7X/A761.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon761(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon761 + raw_model = MinerModel.AVALONMINER.Avalon761 expected_hashboards = 4 expected_chips = 18 diff --git a/pyasic/miners/device/models/avalonminer/A8X/A821.py b/pyasic/miners/device/models/avalonminer/A8X/A821.py index fc25ff1d..fbdd0c17 100644 --- a/pyasic/miners/device/models/avalonminer/A8X/A821.py +++ b/pyasic/miners/device/models/avalonminer/A8X/A821.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon821(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon821 + raw_model = MinerModel.AVALONMINER.Avalon821 expected_hashboards = 4 expected_chips = 26 diff --git a/pyasic/miners/device/models/avalonminer/A8X/A841.py b/pyasic/miners/device/models/avalonminer/A8X/A841.py index d67d9fc7..6f39673b 100644 --- a/pyasic/miners/device/models/avalonminer/A8X/A841.py +++ b/pyasic/miners/device/models/avalonminer/A8X/A841.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon841(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon841 + raw_model = MinerModel.AVALONMINER.Avalon841 expected_hashboards = 4 expected_chips = 26 diff --git a/pyasic/miners/device/models/avalonminer/A8X/A851.py b/pyasic/miners/device/models/avalonminer/A8X/A851.py index 8110be0e..ac8d7d77 100644 --- a/pyasic/miners/device/models/avalonminer/A8X/A851.py +++ b/pyasic/miners/device/models/avalonminer/A8X/A851.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon851(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon851 + raw_model = MinerModel.AVALONMINER.Avalon851 expected_hashboards = 4 expected_chips = 26 diff --git a/pyasic/miners/device/models/avalonminer/A9X/A921.py b/pyasic/miners/device/models/avalonminer/A9X/A921.py index fc7d088f..c198a57b 100644 --- a/pyasic/miners/device/models/avalonminer/A9X/A921.py +++ b/pyasic/miners/device/models/avalonminer/A9X/A921.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import AvalonMinerMake class Avalon921(AvalonMinerMake): - raw_model = MinerModels.AVALONMINER.Avalon921 + raw_model = MinerModel.AVALONMINER.Avalon921 expected_hashboards = 4 expected_chips = 26 diff --git a/pyasic/miners/device/models/epic/blockminer/blockminer.py b/pyasic/miners/device/models/epic/blockminer/blockminer.py index c6745daf..d30025cc 100644 --- a/pyasic/miners/device/models/epic/blockminer/blockminer.py +++ b/pyasic/miners/device/models/epic/blockminer/blockminer.py @@ -1,16 +1,16 @@ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import ePICMake class BlockMiner520i(ePICMake): - raw_model = MinerModels.EPIC.BM520i + raw_model = MinerModel.EPIC.BM520i expected_chips = 124 expected_fans = 4 class BlockMiner720i(ePICMake): - raw_model = MinerModels.EPIC.BM720i + raw_model = MinerModel.EPIC.BM720i expected_chips = 180 expected_fans = 4 diff --git a/pyasic/miners/device/models/goldshell/X5/CK5.py b/pyasic/miners/device/models/goldshell/X5/CK5.py index 0dddc4e0..e375c8e0 100644 --- a/pyasic/miners/device/models/goldshell/X5/CK5.py +++ b/pyasic/miners/device/models/goldshell/X5/CK5.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import GoldshellMake class CK5(GoldshellMake): - raw_model = MinerModels.GOLDSHELL.CK5 + raw_model = MinerModel.GOLDSHELL.CK5 expected_hashboards = 4 expected_chips = 46 diff --git a/pyasic/miners/device/models/goldshell/X5/HS5.py b/pyasic/miners/device/models/goldshell/X5/HS5.py index 21631574..8e29df8f 100644 --- a/pyasic/miners/device/models/goldshell/X5/HS5.py +++ b/pyasic/miners/device/models/goldshell/X5/HS5.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import GoldshellMake class HS5(GoldshellMake): - raw_model = MinerModels.GOLDSHELL.HS5 + raw_model = MinerModel.GOLDSHELL.HS5 expected_hashboards = 4 expected_chips = 46 diff --git a/pyasic/miners/device/models/goldshell/X5/KD5.py b/pyasic/miners/device/models/goldshell/X5/KD5.py index 4f0b06b1..189b42c9 100644 --- a/pyasic/miners/device/models/goldshell/X5/KD5.py +++ b/pyasic/miners/device/models/goldshell/X5/KD5.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import GoldshellMake class KD5(GoldshellMake): - raw_model = MinerModels.GOLDSHELL.KD5 + raw_model = MinerModel.GOLDSHELL.KD5 expected_hashboards = 4 expected_chips = 46 diff --git a/pyasic/miners/device/models/goldshell/XBox/KDBox.py b/pyasic/miners/device/models/goldshell/XBox/KDBox.py index d8674ff3..e3dfa0e7 100644 --- a/pyasic/miners/device/models/goldshell/XBox/KDBox.py +++ b/pyasic/miners/device/models/goldshell/XBox/KDBox.py @@ -13,19 +13,19 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import GoldshellMake class KDBoxII(GoldshellMake): - raw_model = MinerModels.GOLDSHELL.KDBoxII + raw_model = MinerModel.GOLDSHELL.KDBoxII expected_chips = 36 expected_hashboards = 1 class KDBoxPro(GoldshellMake): - raw_model = MinerModels.GOLDSHELL.KDBoxPro + raw_model = MinerModel.GOLDSHELL.KDBoxPro expected_chips = 16 expected_hashboards = 1 diff --git a/pyasic/miners/device/models/goldshell/XMax/KDMax.py b/pyasic/miners/device/models/goldshell/XMax/KDMax.py index c4c586fe..b8a73a01 100644 --- a/pyasic/miners/device/models/goldshell/XMax/KDMax.py +++ b/pyasic/miners/device/models/goldshell/XMax/KDMax.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import GoldshellMake class KDMax(GoldshellMake): - raw_model = MinerModels.GOLDSHELL.KDMax + raw_model = MinerModel.GOLDSHELL.KDMax expected_chips = 84 expected_fans = 4 diff --git a/pyasic/miners/device/models/innosilicon/A10X/A10X.py b/pyasic/miners/device/models/innosilicon/A10X/A10X.py index 53df2039..fe237d99 100644 --- a/pyasic/miners/device/models/innosilicon/A10X/A10X.py +++ b/pyasic/miners/device/models/innosilicon/A10X/A10X.py @@ -13,9 +13,9 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import InnosiliconMake class A10X(InnosiliconMake): - raw_model = MinerModels.INNOSILICON.A10X + raw_model = MinerModel.INNOSILICON.A10X diff --git a/pyasic/miners/device/models/innosilicon/T3X/T3H.py b/pyasic/miners/device/models/innosilicon/T3X/T3H.py index 22be6208..6168fc61 100644 --- a/pyasic/miners/device/models/innosilicon/T3X/T3H.py +++ b/pyasic/miners/device/models/innosilicon/T3X/T3H.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import InnosiliconMake class T3HPlus(InnosiliconMake): - raw_model = MinerModels.INNOSILICON.T3HPlus + raw_model = MinerModel.INNOSILICON.T3HPlus expected_chips = 114 expected_fans = 4 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M20.py b/pyasic/miners/device/models/whatsminer/M2X/M20.py index 60baea06..be3547dd 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M20.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M20.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M20V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20V10 + raw_model = MinerModel.WHATSMINER.M20V10 expected_chips = 70 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M20P.py b/pyasic/miners/device/models/whatsminer/M2X/M20P.py index 4faa5f65..6e1c5db6 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M20P.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M20P.py @@ -13,17 +13,17 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M20PV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20PV10 + raw_model = MinerModel.WHATSMINER.M20PV10 expected_chips = 156 class M20PV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20PV30 + raw_model = MinerModel.WHATSMINER.M20PV30 expected_chips = 148 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M20S.py b/pyasic/miners/device/models/whatsminer/M2X/M20S.py index 0f22a1db..d609b6d2 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M20S.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M20S.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M20SV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20SV10 + raw_model = MinerModel.WHATSMINER.M20SV10 expected_chips = 105 class M20SV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20SV20 + raw_model = MinerModel.WHATSMINER.M20SV20 expected_chips = 111 class M20SV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20SV30 + raw_model = MinerModel.WHATSMINER.M20SV30 expected_chips = 140 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M20S_Plus.py b/pyasic/miners/device/models/whatsminer/M2X/M20S_Plus.py index 6b5b1ae8..bd99e10f 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M20S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M20S_Plus.py @@ -13,9 +13,9 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M20SPlusV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M20SPlusV30 + raw_model = MinerModel.WHATSMINER.M20SPlusV30 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M21.py b/pyasic/miners/device/models/whatsminer/M2X/M21.py index e35e753c..2e5585f6 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M21.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M21.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M21V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M21V10 + raw_model = MinerModel.WHATSMINER.M21V10 expected_chips = 33 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M21S.py b/pyasic/miners/device/models/whatsminer/M2X/M21S.py index a6169965..4bd85aae 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M21S.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M21S.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M21SV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M21SV20 + raw_model = MinerModel.WHATSMINER.M21SV20 expected_chips = 66 class M21SV60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M21SV60 + raw_model = MinerModel.WHATSMINER.M21SV60 expected_chips = 105 class M21SV70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M21SV70 + raw_model = MinerModel.WHATSMINER.M21SV70 expected_chips = 111 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M21S_Plus.py b/pyasic/miners/device/models/whatsminer/M2X/M21S_Plus.py index 1e6881b5..891b8bd0 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M21S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M21S_Plus.py @@ -13,9 +13,9 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M21SPlusV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M21SPlusV20 + raw_model = MinerModel.WHATSMINER.M21SPlusV20 diff --git a/pyasic/miners/device/models/whatsminer/M2X/M29.py b/pyasic/miners/device/models/whatsminer/M2X/M29.py index 68cce556..128dc90c 100644 --- a/pyasic/miners/device/models/whatsminer/M2X/M29.py +++ b/pyasic/miners/device/models/whatsminer/M2X/M29.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M29V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M29V10 + raw_model = MinerModel.WHATSMINER.M29V10 expected_chips = 50 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M30.py b/pyasic/miners/device/models/whatsminer/M3X/M30.py index 3821ba03..1461ecc4 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M30.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M30.py @@ -13,17 +13,17 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M30V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30V10 + raw_model = MinerModel.WHATSMINER.M30V10 expected_chips = 105 class M30V20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30V20 + raw_model = MinerModel.WHATSMINER.M30V20 expected_chips = 111 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M30K.py b/pyasic/miners/device/models/whatsminer/M3X/M30K.py index 42d2c327..e3b82f94 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M30K.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M30K.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M30KV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30KV10 + raw_model = MinerModel.WHATSMINER.M30KV10 expected_hashboards = 4 expected_chips = 240 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M30L.py b/pyasic/miners/device/models/whatsminer/M3X/M30L.py index e95c2228..c204d576 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M30L.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M30L.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M30LV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30LV10 + raw_model = MinerModel.WHATSMINER.M30LV10 board_num = 4 expected_chips = 144 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M30S.py b/pyasic/miners/device/models/whatsminer/M3X/M30S.py index f2b82a34..0b91a958 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M30S.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M30S.py @@ -13,169 +13,169 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M30SV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV10 + raw_model = MinerModel.WHATSMINER.M30SV10 expected_chips = 148 class M30SV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV20 + raw_model = MinerModel.WHATSMINER.M30SV20 expected_chips = 156 class M30SV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV30 + raw_model = MinerModel.WHATSMINER.M30SV30 expected_chips = 164 class M30SV40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV40 + raw_model = MinerModel.WHATSMINER.M30SV40 expected_chips = 172 class M30SV50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV50 + raw_model = MinerModel.WHATSMINER.M30SV50 expected_chips = 156 class M30SV60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV60 + raw_model = MinerModel.WHATSMINER.M30SV60 expected_chips = 164 class M30SV70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV70 + raw_model = MinerModel.WHATSMINER.M30SV70 class M30SV80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SV80 + raw_model = MinerModel.WHATSMINER.M30SV80 expected_chips = 129 class M30SVE10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE10 + raw_model = MinerModel.WHATSMINER.M30SVE10 expected_chips = 105 class M30SVE20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE20 + raw_model = MinerModel.WHATSMINER.M30SVE20 expected_chips = 111 class M30SVE30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE30 + raw_model = MinerModel.WHATSMINER.M30SVE30 expected_chips = 117 class M30SVE40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE40 + raw_model = MinerModel.WHATSMINER.M30SVE40 expected_chips = 123 class M30SVE50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE50 + raw_model = MinerModel.WHATSMINER.M30SVE50 expected_chips = 129 class M30SVE60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE60 + raw_model = MinerModel.WHATSMINER.M30SVE60 class M30SVE70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVE70 + raw_model = MinerModel.WHATSMINER.M30SVE70 class M30SVF10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVF10 + raw_model = MinerModel.WHATSMINER.M30SVF10 expected_chips = 70 class M30SVF20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVF20 + raw_model = MinerModel.WHATSMINER.M30SVF20 expected_chips = 74 class M30SVF30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVF30 + raw_model = MinerModel.WHATSMINER.M30SVF30 expected_chips = 78 class M30SVG10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVG10 + raw_model = MinerModel.WHATSMINER.M30SVG10 expected_chips = 66 class M30SVG20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVG20 + raw_model = MinerModel.WHATSMINER.M30SVG20 expected_chips = 70 class M30SVG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVG30 + raw_model = MinerModel.WHATSMINER.M30SVG30 expected_chips = 74 class M30SVG40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVG40 + raw_model = MinerModel.WHATSMINER.M30SVG40 expected_chips = 78 class M30SVH10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVH10 + raw_model = MinerModel.WHATSMINER.M30SVH10 expected_chips = 64 class M30SVH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVH20 + raw_model = MinerModel.WHATSMINER.M30SVH20 expected_chips = 66 class M30SVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVH30 + raw_model = MinerModel.WHATSMINER.M30SVH30 class M30SVH40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVH40 + raw_model = MinerModel.WHATSMINER.M30SVH40 expected_chips = 64 class M30SVH50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVH50 + raw_model = MinerModel.WHATSMINER.M30SVH50 expected_chips = 66 class M30SVH60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVH60 + raw_model = MinerModel.WHATSMINER.M30SVH60 class M30SVI20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SVI20 + raw_model = MinerModel.WHATSMINER.M30SVI20 expected_chips = 70 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus.py index 03200e15..df750a73 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus.py @@ -13,181 +13,181 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M30SPlusV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV10 + raw_model = MinerModel.WHATSMINER.M30SPlusV10 expected_chips = 215 class M30SPlusV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV20 + raw_model = MinerModel.WHATSMINER.M30SPlusV20 expected_chips = 255 class M30SPlusV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV30 + raw_model = MinerModel.WHATSMINER.M30SPlusV30 class M30SPlusV40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV40 + raw_model = MinerModel.WHATSMINER.M30SPlusV40 expected_chips = 235 class M30SPlusV50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV50 + raw_model = MinerModel.WHATSMINER.M30SPlusV50 expected_chips = 225 class M30SPlusV60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV60 + raw_model = MinerModel.WHATSMINER.M30SPlusV60 expected_chips = 245 class M30SPlusV70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV70 + raw_model = MinerModel.WHATSMINER.M30SPlusV70 expected_chips = 235 class M30SPlusV80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV80 + raw_model = MinerModel.WHATSMINER.M30SPlusV80 expected_chips = 245 class M30SPlusV90(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV90 + raw_model = MinerModel.WHATSMINER.M30SPlusV90 expected_chips = 225 class M30SPlusV100(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusV100 + raw_model = MinerModel.WHATSMINER.M30SPlusV100 expected_chips = 215 class M30SPlusVE30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE30 + raw_model = MinerModel.WHATSMINER.M30SPlusVE30 expected_chips = 148 class M30SPlusVE40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE40 + raw_model = MinerModel.WHATSMINER.M30SPlusVE40 expected_chips = 156 class M30SPlusVE50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE50 + raw_model = MinerModel.WHATSMINER.M30SPlusVE50 expected_chips = 164 class M30SPlusVE60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE60 + raw_model = MinerModel.WHATSMINER.M30SPlusVE60 expected_chips = 172 class M30SPlusVE70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE70 + raw_model = MinerModel.WHATSMINER.M30SPlusVE70 class M30SPlusVE80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE80 + raw_model = MinerModel.WHATSMINER.M30SPlusVE80 class M30SPlusVE90(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE90 + raw_model = MinerModel.WHATSMINER.M30SPlusVE90 class M30SPlusVE100(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVE100 + raw_model = MinerModel.WHATSMINER.M30SPlusVE100 class M30SPlusVF20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVF20 + raw_model = MinerModel.WHATSMINER.M30SPlusVF20 expected_chips = 111 class M30SPlusVF30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVF30 + raw_model = MinerModel.WHATSMINER.M30SPlusVF30 expected_chips = 117 class M30SPlusVG20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVG20 + raw_model = MinerModel.WHATSMINER.M30SPlusVG20 expected_chips = 82 class M30SPlusVG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVG30 + raw_model = MinerModel.WHATSMINER.M30SPlusVG30 expected_chips = 78 class M30SPlusVG40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVG40 + raw_model = MinerModel.WHATSMINER.M30SPlusVG40 expected_chips = 105 class M30SPlusVG50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVG50 + raw_model = MinerModel.WHATSMINER.M30SPlusVG50 expected_chips = 111 class M30SPlusVG60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVG60 + raw_model = MinerModel.WHATSMINER.M30SPlusVG60 expected_chips = 86 class M30SPlusVH10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVH10 + raw_model = MinerModel.WHATSMINER.M30SPlusVH10 expected_chips = 64 class M30SPlusVH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVH20 + raw_model = MinerModel.WHATSMINER.M30SPlusVH20 expected_chips = 66 class M30SPlusVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVH30 + raw_model = MinerModel.WHATSMINER.M30SPlusVH30 expected_chips = 70 class M30SPlusVH40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVH40 + raw_model = MinerModel.WHATSMINER.M30SPlusVH40 expected_chips = 74 class M30SPlusVH50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVH50 + raw_model = MinerModel.WHATSMINER.M30SPlusVH50 expected_chips = 64 class M30SPlusVH60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusVH60 + raw_model = MinerModel.WHATSMINER.M30SPlusVH60 expected_chips = 66 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus_Plus.py index 57dd51ae..9d9d3bd8 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M30S_Plus_Plus.py @@ -13,109 +13,109 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M30SPlusPlusV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusV10 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusV10 expected_hashboards = 4 expected_chips = 255 class M30SPlusPlusV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusV20 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusV20 expected_hashboards = 4 expected_chips = 255 class M30SPlusPlusVE30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVE30 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVE30 expected_chips = 215 class M30SPlusPlusVE40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVE40 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVE40 expected_chips = 225 class M30SPlusPlusVE50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVE50 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVE50 expected_chips = 235 class M30SPlusPlusVF40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVF40 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVF40 expected_chips = 156 class M30SPlusPlusVG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVG30 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVG30 expected_chips = 111 class M30SPlusPlusVG40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVG40 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVG40 expected_chips = 117 class M30SPlusPlusVG50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVG50 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVG50 class M30SPlusPlusVH10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH10 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH10 expected_chips = 82 class M30SPlusPlusVH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH20 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH20 expected_chips = 86 class M30SPlusPlusVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH30 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH30 expected_chips = 111 class M30SPlusPlusVH40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH40 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH40 expected_chips = 70 class M30SPlusPlusVH50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH50 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH50 expected_chips = 74 class M30SPlusPlusVH60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH60 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH60 expected_chips = 78 class M30SPlusPlusVH70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH70 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH70 expected_chips = 70 class M30SPlusPlusVH80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH80 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH80 expected_chips = 74 class M30SPlusPlusVH90(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH90 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH90 expected_chips = 78 class M30SPlusPlusVH100(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVH100 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVH100 expected_chips = 82 class M30SPlusPlusVJ20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVJ20 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVJ20 class M30SPlusPlusVJ30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M30SPlusPlusVJ30 + raw_model = MinerModel.WHATSMINER.M30SPlusPlusVJ30 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M31.py b/pyasic/miners/device/models/whatsminer/M3X/M31.py index ba2af7dc..06065b8a 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M31.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M31.py @@ -13,17 +13,17 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M31V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31V10 + raw_model = MinerModel.WHATSMINER.M31V10 expected_chips = 70 class M31V20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31V20 + raw_model = MinerModel.WHATSMINER.M31V20 expected_chips = 74 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M31H.py b/pyasic/miners/device/models/whatsminer/M3X/M31H.py index 340ac996..cc27fbb4 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M31H.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M31H.py @@ -13,19 +13,19 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M31HV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31HV10 + raw_model = MinerModel.WHATSMINER.M31HV10 expected_chips = 114 expected_fans = 0 class M31HV40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31HV40 + raw_model = MinerModel.WHATSMINER.M31HV40 expected_hashboards = 4 expected_chips = 136 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M31L.py b/pyasic/miners/device/models/whatsminer/M3X/M31L.py index 40aa9a68..48671b07 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M31L.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M31L.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M31LV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31LV10 + raw_model = MinerModel.WHATSMINER.M31LV10 expected_chips = 114 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M31S.py b/pyasic/miners/device/models/whatsminer/M3X/M31S.py index e481f59c..e0af6ab7 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M31S.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M31S.py @@ -13,73 +13,73 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M31SV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV10 + raw_model = MinerModel.WHATSMINER.M31SV10 expected_chips = 105 class M31SV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV20 + raw_model = MinerModel.WHATSMINER.M31SV20 expected_chips = 111 class M31SV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV30 + raw_model = MinerModel.WHATSMINER.M31SV30 expected_chips = 117 class M31SV40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV40 + raw_model = MinerModel.WHATSMINER.M31SV40 expected_chips = 123 class M31SV50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV50 + raw_model = MinerModel.WHATSMINER.M31SV50 expected_chips = 78 class M31SV60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV60 + raw_model = MinerModel.WHATSMINER.M31SV60 expected_chips = 105 class M31SV70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV70 + raw_model = MinerModel.WHATSMINER.M31SV70 expected_chips = 111 class M31SV80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV80 + raw_model = MinerModel.WHATSMINER.M31SV80 class M31SV90(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SV90 + raw_model = MinerModel.WHATSMINER.M31SV90 expected_chips = 117 class M31SVE10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SVE10 + raw_model = MinerModel.WHATSMINER.M31SVE10 expected_chips = 70 class M31SVE20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SVE20 + raw_model = MinerModel.WHATSMINER.M31SVE20 expected_chips = 74 class M31SVE30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SVE30 + raw_model = MinerModel.WHATSMINER.M31SVE30 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M31SE.py b/pyasic/miners/device/models/whatsminer/M3X/M31SE.py index 662d0315..7afd5854 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M31SE.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M31SE.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M31SEV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SEV10 + raw_model = MinerModel.WHATSMINER.M31SEV10 expected_chips = 82 class M31SEV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SEV20 + raw_model = MinerModel.WHATSMINER.M31SEV20 expected_chips = 78 class M31SEV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SEV30 + raw_model = MinerModel.WHATSMINER.M31SEV30 expected_chips = 78 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M31S_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M31S_Plus.py index caa62b64..2b80063d 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M31S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M31S_Plus.py @@ -13,119 +13,119 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M31SPlusV10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV10 + raw_model = MinerModel.WHATSMINER.M31SPlusV10 expected_chips = 105 class M31SPlusV20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV20 + raw_model = MinerModel.WHATSMINER.M31SPlusV20 expected_chips = 111 class M31SPlusV30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV30 + raw_model = MinerModel.WHATSMINER.M31SPlusV30 expected_chips = 117 class M31SPlusV40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV40 + raw_model = MinerModel.WHATSMINER.M31SPlusV40 expected_chips = 123 class M31SPlusV50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV50 + raw_model = MinerModel.WHATSMINER.M31SPlusV50 expected_chips = 148 class M31SPlusV60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV60 + raw_model = MinerModel.WHATSMINER.M31SPlusV60 expected_chips = 156 class M31SPlusV80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV80 + raw_model = MinerModel.WHATSMINER.M31SPlusV80 expected_chips = 129 class M31SPlusV90(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV90 + raw_model = MinerModel.WHATSMINER.M31SPlusV90 expected_chips = 117 class M31SPlusV100(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusV100 + raw_model = MinerModel.WHATSMINER.M31SPlusV100 expected_chips = 111 class M31SPlusVE10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE10 + raw_model = MinerModel.WHATSMINER.M31SPlusVE10 expected_chips = 82 class M31SPlusVE20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE20 + raw_model = MinerModel.WHATSMINER.M31SPlusVE20 expected_chips = 78 class M31SPlusVE30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE30 + raw_model = MinerModel.WHATSMINER.M31SPlusVE30 expected_chips = 105 class M31SPlusVE40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE40 + raw_model = MinerModel.WHATSMINER.M31SPlusVE40 expected_chips = 111 class M31SPlusVE50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE50 + raw_model = MinerModel.WHATSMINER.M31SPlusVE50 expected_chips = 117 class M31SPlusVE60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE60 + raw_model = MinerModel.WHATSMINER.M31SPlusVE60 class M31SPlusVE80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVE80 + raw_model = MinerModel.WHATSMINER.M31SPlusVE80 class M31SPlusVF20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVF20 + raw_model = MinerModel.WHATSMINER.M31SPlusVF20 expected_chips = 66 class M31SPlusVF30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVF30 + raw_model = MinerModel.WHATSMINER.M31SPlusVF30 class M31SPlusVG20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVG20 + raw_model = MinerModel.WHATSMINER.M31SPlusVG20 expected_chips = 66 class M31SPlusVG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M31SPlusVG30 + raw_model = MinerModel.WHATSMINER.M31SPlusVG30 expected_chips = 70 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M32.py b/pyasic/miners/device/models/whatsminer/M3X/M32.py index 879452db..fb8a02a8 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M32.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M32.py @@ -13,17 +13,17 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M32V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M32V10 + raw_model = MinerModel.WHATSMINER.M32V10 expected_chips = 78 class M32V20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M32V20 + raw_model = MinerModel.WHATSMINER.M32V20 expected_chips = 74 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M32S.py b/pyasic/miners/device/models/whatsminer/M3X/M32S.py index 19c9d481..ed27e1d6 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M32S.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M32S.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M32S(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M32S + raw_model = MinerModel.WHATSMINER.M32S expected_chips = 78 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M33.py b/pyasic/miners/device/models/whatsminer/M3X/M33.py index 40851b44..6879de10 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M33.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M33.py @@ -13,26 +13,26 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M33V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33V10 + raw_model = MinerModel.WHATSMINER.M33V10 expected_chips = 33 expected_fans = 0 class M33V20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33V20 + raw_model = MinerModel.WHATSMINER.M33V20 expected_chips = 62 expected_fans = 0 class M33V30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33V30 + raw_model = MinerModel.WHATSMINER.M33V30 expected_chips = 66 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M33S.py b/pyasic/miners/device/models/whatsminer/M3X/M33S.py index 47ff467b..a06f5997 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M33S.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M33S.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M33SVG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SVG30 + raw_model = MinerModel.WHATSMINER.M33SVG30 expected_hashboards = 4 expected_chips = 116 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus.py index 87416459..d875616d 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M33SPlusVG20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SPlusVG20 + raw_model = MinerModel.WHATSMINER.M33SPlusVG20 expected_hashboards = 4 expected_chips = 112 @@ -26,7 +26,7 @@ class M33SPlusVG20(WhatsMinerMake): class M33SPlusVH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SPlusVH20 + raw_model = MinerModel.WHATSMINER.M33SPlusVH20 expected_hashboards = 4 expected_chips = 100 @@ -34,7 +34,7 @@ class M33SPlusVH20(WhatsMinerMake): class M33SPlusVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SPlusVH30 + raw_model = MinerModel.WHATSMINER.M33SPlusVH30 expected_hashboards = 4 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus_Plus.py index 417457e8..c1138acf 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M33S_Plus_Plus.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M33SPlusPlusVH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SPlusPlusVH20 + raw_model = MinerModel.WHATSMINER.M33SPlusPlusVH20 expected_hashboards = 4 expected_chips = 112 @@ -26,14 +26,14 @@ class M33SPlusPlusVH20(WhatsMinerMake): class M33SPlusPlusVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SPlusPlusVH30 + raw_model = MinerModel.WHATSMINER.M33SPlusPlusVH30 expected_hashboards = 4 expected_fans = 0 class M33SPlusPlusVG40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M33SPlusPlusVG40 + raw_model = MinerModel.WHATSMINER.M33SPlusPlusVG40 expected_hashboards = 4 expected_chips = 174 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M34S_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M34S_Plus.py index 7afe5fa0..b02d3bca 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M34S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M34S_Plus.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M34SPlusVE10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M34SPlusVE10 + raw_model = MinerModel.WHATSMINER.M34SPlusVE10 expected_hashboards = 4 expected_chips = 116 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M36S.py b/pyasic/miners/device/models/whatsminer/M3X/M36S.py index e8a050ff..0b7d2139 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M36S.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M36S.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M36SVE10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M36SVE10 + raw_model = MinerModel.WHATSMINER.M36SVE10 expected_hashboards = 4 expected_chips = 114 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus.py index 965c0fc4..5c56468f 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M36SPlusVG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M36SPlusVG30 + raw_model = MinerModel.WHATSMINER.M36SPlusVG30 expected_hashboards = 4 expected_chips = 108 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus_Plus.py b/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus_Plus.py index 30ca3739..6553cbb2 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M36S_Plus_Plus.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M36SPlusPlusVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M36SPlusPlusVH30 + raw_model = MinerModel.WHATSMINER.M36SPlusPlusVH30 expected_hashboards = 4 expected_chips = 80 diff --git a/pyasic/miners/device/models/whatsminer/M3X/M39.py b/pyasic/miners/device/models/whatsminer/M3X/M39.py index 7982fb95..b2cbe068 100644 --- a/pyasic/miners/device/models/whatsminer/M3X/M39.py +++ b/pyasic/miners/device/models/whatsminer/M3X/M39.py @@ -13,26 +13,26 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M39V10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M39V10 + raw_model = MinerModel.WHATSMINER.M39V10 expected_chips = 50 expected_fans = 0 class M39V20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M39V20 + raw_model = MinerModel.WHATSMINER.M39V20 expected_chips = 54 expected_fans = 0 class M39V30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M39V30 + raw_model = MinerModel.WHATSMINER.M39V30 expected_chips = 68 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M50.py b/pyasic/miners/device/models/whatsminer/M5X/M50.py index 80369ecf..0cb2d4a7 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M50.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M50.py @@ -13,76 +13,76 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M50VE30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VE30 + raw_model = MinerModel.WHATSMINER.M50VE30 expected_hashboards = 4 expected_chips = 255 class M50VG30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VG30 + raw_model = MinerModel.WHATSMINER.M50VG30 expected_chips = 156 class M50VH10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH10 + raw_model = MinerModel.WHATSMINER.M50VH10 expected_chips = 86 class M50VH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH20 + raw_model = MinerModel.WHATSMINER.M50VH20 expected_chips = 111 class M50VH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH30 + raw_model = MinerModel.WHATSMINER.M50VH30 expected_chips = 117 class M50VH40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH40 + raw_model = MinerModel.WHATSMINER.M50VH40 expected_chips = 84 class M50VH50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH50 + raw_model = MinerModel.WHATSMINER.M50VH50 expected_chips = 105 class M50VH60(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH60 + raw_model = MinerModel.WHATSMINER.M50VH60 expected_chips = 84 class M50VH70(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH70 + raw_model = MinerModel.WHATSMINER.M50VH70 class M50VH80(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VH80 + raw_model = MinerModel.WHATSMINER.M50VH80 expected_chips = 111 class M50VJ10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VJ10 + raw_model = MinerModel.WHATSMINER.M50VJ10 class M50VJ20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VJ20 + raw_model = MinerModel.WHATSMINER.M50VJ20 class M50VJ30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50VJ30 + raw_model = MinerModel.WHATSMINER.M50VJ30 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M50S.py b/pyasic/miners/device/models/whatsminer/M5X/M50S.py index 7db6975e..51cf9871 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M50S.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M50S.py @@ -13,41 +13,41 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M50SVJ10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVJ10 + raw_model = MinerModel.WHATSMINER.M50SVJ10 class M50SVJ20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVJ20 + raw_model = MinerModel.WHATSMINER.M50SVJ20 class M50SVJ30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVJ30 + raw_model = MinerModel.WHATSMINER.M50SVJ30 class M50SVH10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVH10 + raw_model = MinerModel.WHATSMINER.M50SVH10 class M50SVH20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVH20 + raw_model = MinerModel.WHATSMINER.M50SVH20 expected_chips = 135 class M50SVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVH30 + raw_model = MinerModel.WHATSMINER.M50SVH30 expected_chips = 156 class M50SVH40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVH40 + raw_model = MinerModel.WHATSMINER.M50SVH40 class M50SVH50(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SVH50 + raw_model = MinerModel.WHATSMINER.M50SVH50 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus.py b/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus.py index 43573a10..aa1e8fa7 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M50SPlusVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusVH30 + raw_model = MinerModel.WHATSMINER.M50SPlusVH30 class M50SPlusVH40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusVH40 + raw_model = MinerModel.WHATSMINER.M50SPlusVH40 class M50SPlusVJ30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusVJ30 + raw_model = MinerModel.WHATSMINER.M50SPlusVJ30 class M50SPlusVK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusVK20 + raw_model = MinerModel.WHATSMINER.M50SPlusVK20 expected_chips = 117 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus_Plus.py b/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus_Plus.py index e8657907..29aab688 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M50S_Plus_Plus.py @@ -13,21 +13,21 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M50SPlusPlusVK10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusPlusVK10 + raw_model = MinerModel.WHATSMINER.M50SPlusPlusVK10 expected_chips = 117 class M50SPlusPlusVK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusPlusVK20 + raw_model = MinerModel.WHATSMINER.M50SPlusPlusVK20 class M50SPlusPlusVK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M50SPlusPlusVK30 + raw_model = MinerModel.WHATSMINER.M50SPlusPlusVK30 expected_chips = 76 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M53.py b/pyasic/miners/device/models/whatsminer/M5X/M53.py index faf0c2bd..5efbdb35 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M53.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M53.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M53VH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M53VH30 + raw_model = MinerModel.WHATSMINER.M53VH30 expected_hashboards = 4 expected_chips = 128 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M53S.py b/pyasic/miners/device/models/whatsminer/M5X/M53S.py index 406e6b9d..20fc9b30 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M53S.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M53S.py @@ -13,17 +13,17 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M53SVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M53SVH30 + raw_model = MinerModel.WHATSMINER.M53SVH30 expected_fans = 0 class M53SVJ40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M53SVJ40 + raw_model = MinerModel.WHATSMINER.M53SVJ40 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus.py b/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus.py index b3692f08..dc4e9607 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M53SPlusVJ30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M53SPlusVJ30 + raw_model = MinerModel.WHATSMINER.M53SPlusVJ30 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus_Plus.py b/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus_Plus.py index 65bff356..e576499d 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M53S_Plus_Plus.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M53SPlusPlusVK10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M53SPlusPlusVK10 + raw_model = MinerModel.WHATSMINER.M53SPlusPlusVK10 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M56.py b/pyasic/miners/device/models/whatsminer/M5X/M56.py index 51bbeac2..13f21d12 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M56.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M56.py @@ -13,12 +13,12 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M56VH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M56VH30 + raw_model = MinerModel.WHATSMINER.M56VH30 expected_hashboards = 4 expected_chips = 108 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M56S.py b/pyasic/miners/device/models/whatsminer/M5X/M56S.py index 6ab6d5d9..56aaad91 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M56S.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M56S.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M56SVH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M56SVH30 + raw_model = MinerModel.WHATSMINER.M56SVH30 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M56S_Plus.py b/pyasic/miners/device/models/whatsminer/M5X/M56S_Plus.py index 1155e1ad..dfb3d01e 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M56S_Plus.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M56S_Plus.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M56SPlusVJ30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M56SPlusVJ30 + raw_model = MinerModel.WHATSMINER.M56SPlusVJ30 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M5X/M59.py b/pyasic/miners/device/models/whatsminer/M5X/M59.py index e4f971e3..2d907a0f 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M59.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M59.py @@ -13,11 +13,11 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M59VH30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M59VH30 + raw_model = MinerModel.WHATSMINER.M59VH30 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M6X/M60.py b/pyasic/miners/device/models/whatsminer/M6X/M60.py index b6902df9..2f3418a2 100644 --- a/pyasic/miners/device/models/whatsminer/M6X/M60.py +++ b/pyasic/miners/device/models/whatsminer/M6X/M60.py @@ -13,21 +13,21 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M60VK10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60VK10 + raw_model = MinerModel.WHATSMINER.M60VK10 class M60VK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60VK20 + raw_model = MinerModel.WHATSMINER.M60VK20 class M60VK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60VK30 + raw_model = MinerModel.WHATSMINER.M60VK30 class M60VK40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60VK40 + raw_model = MinerModel.WHATSMINER.M60VK40 diff --git a/pyasic/miners/device/models/whatsminer/M6X/M60S.py b/pyasic/miners/device/models/whatsminer/M6X/M60S.py index 4efdd0a5..9a6b9494 100644 --- a/pyasic/miners/device/models/whatsminer/M6X/M60S.py +++ b/pyasic/miners/device/models/whatsminer/M6X/M60S.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M60SVK10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60SVK10 + raw_model = MinerModel.WHATSMINER.M60SVK10 class M60SVK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60SVK20 + raw_model = MinerModel.WHATSMINER.M60SVK20 class M60SVK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60SVK30 + raw_model = MinerModel.WHATSMINER.M60SVK30 expected_chips = 78 class M60SVK40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M60SVK40 + raw_model = MinerModel.WHATSMINER.M60SVK40 diff --git a/pyasic/miners/device/models/whatsminer/M6X/M63.py b/pyasic/miners/device/models/whatsminer/M6X/M63.py index 5c4fb493..fd0a219e 100644 --- a/pyasic/miners/device/models/whatsminer/M6X/M63.py +++ b/pyasic/miners/device/models/whatsminer/M6X/M63.py @@ -13,24 +13,24 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M63VK10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M63VK10 + raw_model = MinerModel.WHATSMINER.M63VK10 expected_fans = 0 class M63VK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M63VK20 + raw_model = MinerModel.WHATSMINER.M63VK20 expected_fans = 0 class M63VK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M63VK30 + raw_model = MinerModel.WHATSMINER.M63VK30 expected_chips = 68 expected_hashboards = 4 diff --git a/pyasic/miners/device/models/whatsminer/M6X/M63S.py b/pyasic/miners/device/models/whatsminer/M6X/M63S.py index 49ad3a4d..7ed57e11 100644 --- a/pyasic/miners/device/models/whatsminer/M6X/M63S.py +++ b/pyasic/miners/device/models/whatsminer/M6X/M63S.py @@ -13,23 +13,23 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M63SVK10(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M63SVK10 + raw_model = MinerModel.WHATSMINER.M63SVK10 expected_fans = 0 class M63SVK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M63SVK20 + raw_model = MinerModel.WHATSMINER.M63SVK20 expected_fans = 0 class M63SVK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M63SVK30 + raw_model = MinerModel.WHATSMINER.M63SVK30 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M6X/M66.py b/pyasic/miners/device/models/whatsminer/M6X/M66.py index 5912fe0b..325a9063 100644 --- a/pyasic/miners/device/models/whatsminer/M6X/M66.py +++ b/pyasic/miners/device/models/whatsminer/M6X/M66.py @@ -13,17 +13,17 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M66VK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M66VK20 + raw_model = MinerModel.WHATSMINER.M66VK20 expected_fans = 0 class M66VK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M66VK30 + raw_model = MinerModel.WHATSMINER.M66VK30 expected_fans = 0 diff --git a/pyasic/miners/device/models/whatsminer/M6X/M66S.py b/pyasic/miners/device/models/whatsminer/M6X/M66S.py index 0284d5a8..3fd2b221 100644 --- a/pyasic/miners/device/models/whatsminer/M6X/M66S.py +++ b/pyasic/miners/device/models/whatsminer/M6X/M66S.py @@ -13,18 +13,18 @@ # See the License for the specific language governing permissions and - # limitations under the License. - # ------------------------------------------------------------------------------ -from pyasic.device.models import MinerModels +from pyasic.device.models import MinerModel from pyasic.miners.device.makes import WhatsMinerMake class M66SVK20(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M66SVK20 + raw_model = MinerModel.WHATSMINER.M66SVK20 expected_fans = 0 class M66SVK30(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M66SVK30 + raw_model = MinerModel.WHATSMINER.M66SVK30 expected_chips = 96 expected_hashboards = 4 @@ -32,6 +32,6 @@ class M66SVK30(WhatsMinerMake): class M66SVK40(WhatsMinerMake): - raw_model = MinerModels.WHATSMINER.M66SVK40 + raw_model = MinerModel.WHATSMINER.M66SVK40 expected_fans = 0