From 88de27c9e773551a6935b4acf920a57b9875c53d Mon Sep 17 00:00:00 2001 From: Upstream Data Date: Tue, 5 Nov 2024 09:32:30 -0700 Subject: [PATCH] feature: add support for Whatsminer M50VH90 --- pyasic/device/models.py | 1 + pyasic/miners/device/models/whatsminer/M5X/M50.py | 6 ++++++ pyasic/miners/device/models/whatsminer/M5X/__init__.py | 1 + pyasic/miners/factory.py | 1 + pyasic/miners/whatsminer/btminer/M5X/M50.py | 5 +++++ pyasic/miners/whatsminer/btminer/M5X/__init__.py | 1 + 6 files changed, 15 insertions(+) diff --git a/pyasic/device/models.py b/pyasic/device/models.py index 75d86c6c..332c89ea 100644 --- a/pyasic/device/models.py +++ b/pyasic/device/models.py @@ -224,6 +224,7 @@ class WhatsminerModels(str, Enum): M50VH60 = "M50 VH60" M50VH70 = "M50 VH70" M50VH80 = "M50 VH80" + M50VH90 = "M50 VH90" M50VJ10 = "M50 VJ10" M50VJ20 = "M50 VJ20" M50VJ30 = "M50 VJ30" diff --git a/pyasic/miners/device/models/whatsminer/M5X/M50.py b/pyasic/miners/device/models/whatsminer/M5X/M50.py index 94af6efb..f56abd9b 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/M50.py +++ b/pyasic/miners/device/models/whatsminer/M5X/M50.py @@ -78,6 +78,12 @@ class M50VH80(WhatsMinerMake): expected_chips = 111 +class M50VH90(WhatsMinerMake): + raw_model = MinerModel.WHATSMINER.M50VH90 + + expected_chips = 117 + + class M50VJ10(WhatsMinerMake): raw_model = MinerModel.WHATSMINER.M50VJ10 diff --git a/pyasic/miners/device/models/whatsminer/M5X/__init__.py b/pyasic/miners/device/models/whatsminer/M5X/__init__.py index 326774b2..30c7046e 100644 --- a/pyasic/miners/device/models/whatsminer/M5X/__init__.py +++ b/pyasic/miners/device/models/whatsminer/M5X/__init__.py @@ -25,6 +25,7 @@ from .M50 import ( M50VH60, M50VH70, M50VH80, + M50VH90, M50VJ10, M50VJ20, M50VJ30, diff --git a/pyasic/miners/factory.py b/pyasic/miners/factory.py index 05eba786..b7e960c5 100644 --- a/pyasic/miners/factory.py +++ b/pyasic/miners/factory.py @@ -276,6 +276,7 @@ MINER_CLASSES = { "M50VH60": BTMinerM50VH60, "M50VH70": BTMinerM50VH70, "M50VH80": BTMinerM50VH80, + "M50VH90": BTMinerM50VH90, "M50VJ10": BTMinerM50VJ10, "M50VJ20": BTMinerM50VJ20, "M50VJ30": BTMinerM50VJ30, diff --git a/pyasic/miners/whatsminer/btminer/M5X/M50.py b/pyasic/miners/whatsminer/btminer/M5X/M50.py index 40ab6762..302f12a3 100644 --- a/pyasic/miners/whatsminer/btminer/M5X/M50.py +++ b/pyasic/miners/whatsminer/btminer/M5X/M50.py @@ -26,6 +26,7 @@ from pyasic.miners.device.models import ( M50VH60, M50VH70, M50VH80, + M50VH90, M50VJ10, M50VJ20, M50VJ30, @@ -72,6 +73,10 @@ class BTMinerM50VH80(M5X, M50VH80): pass +class BTMinerM50VH90(M5X, M50VH90): + pass + + class BTMinerM50VJ10(M5X, M50VJ10): pass diff --git a/pyasic/miners/whatsminer/btminer/M5X/__init__.py b/pyasic/miners/whatsminer/btminer/M5X/__init__.py index 0e1790a9..6e1d25fc 100644 --- a/pyasic/miners/whatsminer/btminer/M5X/__init__.py +++ b/pyasic/miners/whatsminer/btminer/M5X/__init__.py @@ -25,6 +25,7 @@ from .M50 import ( BTMinerM50VH60, BTMinerM50VH70, BTMinerM50VH80, + BTMinerM50VH90, BTMinerM50VJ10, BTMinerM50VJ20, BTMinerM50VJ30,