bug: fix some naming issues with auradine, and add chip count for AT1500.

pyasic/miners/types/auradine/AD/__init__.py

@@ -1,2 +1,2 @@
-from .AT1 import AuradineAT1500
+from .AD2 import AuradineAD2500
-from .AT2 import AuradineAT2860, AuradineAT2880
+from .AD3 import AuradineAD3500

pyasic/miners/types/auradine/AT/AT1.py

@@ -3,4 +3,5 @@ from pyasic.miners.makes import AuradineMake
 
 class AuradineAT1500(AuradineMake):
     raw_model = "AT1500"
+    expected_chips = 132
     expected_fans = 4

pyasic/miners/types/auradine/AT/__init__.py

@@ -1,2 +1,2 @@
-from .AD2 import AuradineAD2500
+from .AT1 import AuradineAT1500
-from .AD3 import AuradineAD3500
+from .AT2 import AuradineAT2860, AuradineAT2880