feature: add support for M34S+ and M34S+ VE10

This commit is contained in:
UpstreamData
2022-11-04 13:12:28 -06:00
parent 9672dd6873
commit 5b078b4b27
7 changed files with 96 additions and 0 deletions

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@@ -59,6 +59,8 @@ details {
</ul>
</details>
</ul>
</details>
<details>
<summary>M3X Series:</summary>
<ul>
<details>
@@ -109,6 +111,12 @@ details {
<details>
<summary><a href="../whatsminer/M3X/#m32s">M32S</a></summary>
</details>
<details>
<summary><a href="../whatsminer/M3X/#m34s">M34S+</a></summary>
<ul>
<li><a href="../whatsminer/M3X/#m34sve10">VE10</a></li>
</ul>
</details>
</ul>
</details>
<details>

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@@ -193,3 +193,19 @@
options:
show_root_heading: false
heading_level: 4
## M34S+
::: pyasic.miners.whatsminer.btminer.M3X.M34S_Plus.BTMinerM34SPlus
handler: python
options:
show_root_heading: false
heading_level: 4
## M34S+VE10
::: pyasic.miners.whatsminer.btminer.M3X.M34S_Plus.BTMinerM34SPlusVE10
handler: python
options:
show_root_heading: false
heading_level: 4

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@@ -0,0 +1,34 @@
# Copyright 2022 Upstream Data Inc
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
from pyasic.miners.base import BaseMiner
class M34SPlus(BaseMiner):
def __init__(self, ip: str):
super().__init__()
self.ip = ip
self.model = "M34S+"
# TODO: has 4 boards instead of 3
self.nominal_chips = 464
self.fan_count = 2
class M34SPlusVE10(BaseMiner):
def __init__(self, ip: str):
super().__init__()
self.ip = ip
self.model = "M34S+ VE10"
self.nominal_chips = 464
self.fan_count = 2

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@@ -34,3 +34,4 @@ from .M31S_Plus import (
from .M32 import M32, M32V20
from .M32S import M32S
from .M34S_Plus import M34SPlus, M34SPlusVE10

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@@ -216,6 +216,11 @@ MINER_CLASSES = {
"BTMiner": BTMinerM32,
"20": BTMinerM32V20,
},
"M34S+": {
"Default": BTMinerM34SPlus,
"BTMiner": BTMinerM34SPlus,
"E10": BTMinerM34SPlusVE10,
},
"M50": {
"Default": BTMinerM50,
"BTMiner": BTMinerM50,

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@@ -0,0 +1,31 @@
# Copyright 2022 Upstream Data Inc
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
from pyasic.miners._backends import BTMiner # noqa - Ignore access to _module
from pyasic.miners._types import (
M34SPlus,
M34SPlusVE10,
) # noqa - Ignore access to _module
class BTMinerM34SPlus(BTMiner, M34SPlus):
def __init__(self, ip: str) -> None:
super().__init__(ip)
self.ip = ip
class BTMinerM34SPlusVE10(BTMiner, M34SPlusVE10):
def __init__(self, ip: str) -> None:
super().__init__(ip)
self.ip = ip

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@@ -45,3 +45,4 @@ from .M31S_Plus import (
from .M32 import BTMinerM32, BTMinerM32V20
from .M32S import BTMinerM32S
from .M34S_Plus import BTMinerM34SPlus, BTMinerM34SPlusVE10