From 5436bede29bd9f8073f766c0730764463668ae89 Mon Sep 17 00:00:00 2001
From: Upstream Data <brett@upstreamdata.ca>
Date: Tue, 10 Dec 2024 12:28:25 -0700
Subject: [PATCH] bug: add chip count for avalon 1126 Pro

---
 pyasic/miners/device/models/avalonminer/A11X/A1126.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/pyasic/miners/device/models/avalonminer/A11X/A1126.py b/pyasic/miners/device/models/avalonminer/A11X/A1126.py
index f1ee12c2..5029dc5c 100644
--- a/pyasic/miners/device/models/avalonminer/A11X/A1126.py
+++ b/pyasic/miners/device/models/avalonminer/A11X/A1126.py
@@ -21,6 +21,7 @@ from pyasic.miners.device.makes import AvalonMinerMake
 class Avalon1126Pro(AvalonMinerMake):
     raw_model = MinerModel.AVALONMINER.Avalon1126Pro
 
+    expected_chips = 120
     expected_fans = 4
     expected_hashboards = 3
     algo = MinerAlgo.SHA256